diff options
Diffstat (limited to 'llvm/test/CodeGen/RISCV/zext-with-load-is-free.ll')
| -rw-r--r-- | llvm/test/CodeGen/RISCV/zext-with-load-is-free.ll | 17 |
1 files changed, 7 insertions, 10 deletions
diff --git a/llvm/test/CodeGen/RISCV/zext-with-load-is-free.ll b/llvm/test/CodeGen/RISCV/zext-with-load-is-free.ll index a937e638e0c..8c8965afa46 100644 --- a/llvm/test/CodeGen/RISCV/zext-with-load-is-free.ll +++ b/llvm/test/CodeGen/RISCV/zext-with-load-is-free.ll @@ -15,8 +15,7 @@ define i32 @test_zext_i8() { ; RV32I-NEXT: bne a0, a1, .LBB0_3 ; RV32I-NEXT: # %bb.1: # %entry ; RV32I-NEXT: lui a0, %hi(bytes+1) -; RV32I-NEXT: lb a0, %lo(bytes+1)(a0) -; RV32I-NEXT: andi a0, a0, 255 +; RV32I-NEXT: lbu a0, %lo(bytes+1)(a0) ; RV32I-NEXT: addi a1, zero, 7 ; RV32I-NEXT: bne a0, a1, .LBB0_3 ; RV32I-NEXT: # %bb.2: # %if.end @@ -46,15 +45,13 @@ define i32 @test_zext_i16() { ; RV32I-LABEL: test_zext_i16: ; RV32I: # %bb.0: # %entry ; RV32I-NEXT: lui a0, 16 -; RV32I-NEXT: addi a1, a0, -120 -; RV32I-NEXT: lui a2, %hi(shorts) -; RV32I-NEXT: lhu a2, %lo(shorts)(a2) -; RV32I-NEXT: bne a2, a1, .LBB1_3 +; RV32I-NEXT: addi a0, a0, -120 +; RV32I-NEXT: lui a1, %hi(shorts) +; RV32I-NEXT: lhu a1, %lo(shorts)(a1) +; RV32I-NEXT: bne a1, a0, .LBB1_3 ; RV32I-NEXT: # %bb.1: # %entry -; RV32I-NEXT: lui a1, %hi(shorts+2) -; RV32I-NEXT: lh a1, %lo(shorts+2)(a1) -; RV32I-NEXT: addi a0, a0, -1 -; RV32I-NEXT: and a0, a1, a0 +; RV32I-NEXT: lui a0, %hi(shorts+2) +; RV32I-NEXT: lhu a0, %lo(shorts+2)(a0) ; RV32I-NEXT: addi a1, zero, 7 ; RV32I-NEXT: bne a0, a1, .LBB1_3 ; RV32I-NEXT: # %bb.2: # %if.end |
