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-rw-r--r--llvm/test/CodeGen/Mips/instverify/dext-pos.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dext-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dextm-pos-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dextm-pos.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dextm-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dextu-pos-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dextu-pos.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dextu-size-valid.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dextu-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dins-pos-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dins-pos.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dins-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dinsm-pos-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dinsm-pos.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dinsm-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dinsu-pos-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dinsu-pos.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dinsu-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/ext-pos-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/ext-pos.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/ext-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/ins-pos-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/ins-pos.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/ins-size.mir2
24 files changed, 24 insertions, 24 deletions
diff --git a/llvm/test/CodeGen/Mips/instverify/dext-pos.mir b/llvm/test/CodeGen/Mips/instverify/dext-pos.mir
index 3db06f70a9d..a93231b72a0 100644
--- a/llvm/test/CodeGen/Mips/instverify/dext-pos.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dext-pos.mir
@@ -6,7 +6,7 @@
# Check that the machine verifier checks the position operand is in the range 0..31
---
name: dext
-alignment: 3
+alignment: 8
exposesReturnsTwice: false
legalized: false
regBankSelected: false
diff --git a/llvm/test/CodeGen/Mips/instverify/dext-size.mir b/llvm/test/CodeGen/Mips/instverify/dext-size.mir
index c66050ae159..6ba7243cdfb 100644
--- a/llvm/test/CodeGen/Mips/instverify/dext-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dext-size.mir
@@ -6,7 +6,7 @@
# Check that the machine verifier checks the size operand is in the range 1..32
---
name: dext
-alignment: 3
+alignment: 8
exposesReturnsTwice: false
legalized: false
regBankSelected: false
diff --git a/llvm/test/CodeGen/Mips/instverify/dextm-pos-size.mir b/llvm/test/CodeGen/Mips/instverify/dextm-pos-size.mir
index 14b9da27821..fbf84819a0f 100644
--- a/llvm/test/CodeGen/Mips/instverify/dextm-pos-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dextm-pos-size.mir
@@ -6,7 +6,7 @@
# Check that the machine verifier checks the pos + size is in the range 33..64
---
name: dextm
-alignment: 3
+alignment: 8
exposesReturnsTwice: false
legalized: false
regBankSelected: false
diff --git a/llvm/test/CodeGen/Mips/instverify/dextm-pos.mir b/llvm/test/CodeGen/Mips/instverify/dextm-pos.mir
index e8ca6179257..d4cf55bf6ca 100644
--- a/llvm/test/CodeGen/Mips/instverify/dextm-pos.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dextm-pos.mir
@@ -6,7 +6,7 @@
# Check that the machine verifier checks the position operand is in the range 0..31
---
name: dextm
-alignment: 3
+alignment: 8
exposesReturnsTwice: false
legalized: false
regBankSelected: false
diff --git a/llvm/test/CodeGen/Mips/instverify/dextm-size.mir b/llvm/test/CodeGen/Mips/instverify/dextm-size.mir
index 1136281a633..cd9fd2de915 100644
--- a/llvm/test/CodeGen/Mips/instverify/dextm-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dextm-size.mir
@@ -6,7 +6,7 @@
# Check that the machine verifier checks the size operand is in the range 33..64
---
name: dextm
-alignment: 3
+alignment: 8
exposesReturnsTwice: false
legalized: false
regBankSelected: false
diff --git a/llvm/test/CodeGen/Mips/instverify/dextu-pos-size.mir b/llvm/test/CodeGen/Mips/instverify/dextu-pos-size.mir
index f70f3fe8764..782596ec4ec 100644
--- a/llvm/test/CodeGen/Mips/instverify/dextu-pos-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dextu-pos-size.mir
@@ -6,7 +6,7 @@
# Check that the machine verifier checks the pos + size is in the range 33..64
---
name: dextu
-alignment: 3
+alignment: 8
exposesReturnsTwice: false
legalized: false
regBankSelected: false
diff --git a/llvm/test/CodeGen/Mips/instverify/dextu-pos.mir b/llvm/test/CodeGen/Mips/instverify/dextu-pos.mir
index 2f01b5ad534..418c98f44fd 100644
--- a/llvm/test/CodeGen/Mips/instverify/dextu-pos.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dextu-pos.mir
@@ -6,7 +6,7 @@
# Check that the machine verifier checks the position operand is in the range 32..63
---
name: dextu
-alignment: 3
+alignment: 8
exposesReturnsTwice: false
legalized: false
regBankSelected: false
diff --git a/llvm/test/CodeGen/Mips/instverify/dextu-size-valid.mir b/llvm/test/CodeGen/Mips/instverify/dextu-size-valid.mir
index da6444914b0..6663b96494a 100644
--- a/llvm/test/CodeGen/Mips/instverify/dextu-size-valid.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dextu-size-valid.mir
@@ -6,7 +6,7 @@
# Check that the machine verifier checks the size operand is in the range 1..32
---
name: dextu
-alignment: 3
+alignment: 8
exposesReturnsTwice: false
legalized: false
regBankSelected: false
diff --git a/llvm/test/CodeGen/Mips/instverify/dextu-size.mir b/llvm/test/CodeGen/Mips/instverify/dextu-size.mir
index 2958c5d272d..70f12dd1a91 100644
--- a/llvm/test/CodeGen/Mips/instverify/dextu-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dextu-size.mir
@@ -6,7 +6,7 @@
# Check that the machine verifier checks the size operand is in the range 1..32
---
name: dextu
-alignment: 3
+alignment: 8
exposesReturnsTwice: false
legalized: false
regBankSelected: false
diff --git a/llvm/test/CodeGen/Mips/instverify/dins-pos-size.mir b/llvm/test/CodeGen/Mips/instverify/dins-pos-size.mir
index e4cfd7c21d7..ec6f24aed18 100644
--- a/llvm/test/CodeGen/Mips/instverify/dins-pos-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dins-pos-size.mir
@@ -6,7 +6,7 @@
# Check that the machine verifier checks the pos + size is in the range 1..32
---
name: dins
-alignment: 3
+alignment: 8
exposesReturnsTwice: false
legalized: false
regBankSelected: false
diff --git a/llvm/test/CodeGen/Mips/instverify/dins-pos.mir b/llvm/test/CodeGen/Mips/instverify/dins-pos.mir
index 05aaf2d2fd5..13a7c6536da 100644
--- a/llvm/test/CodeGen/Mips/instverify/dins-pos.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dins-pos.mir
@@ -6,7 +6,7 @@
# Check that the machine verifier checks the position operand is in the range 0..31
---
name: dins
-alignment: 3
+alignment: 8
exposesReturnsTwice: false
legalized: false
regBankSelected: false
diff --git a/llvm/test/CodeGen/Mips/instverify/dins-size.mir b/llvm/test/CodeGen/Mips/instverify/dins-size.mir
index 2227d6f8043..63e6f9193c9 100644
--- a/llvm/test/CodeGen/Mips/instverify/dins-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dins-size.mir
@@ -6,7 +6,7 @@
# Check that the machine verifier checks the size operand is in the range 1..32
---
name: dins
-alignment: 3
+alignment: 8
exposesReturnsTwice: false
legalized: false
regBankSelected: false
diff --git a/llvm/test/CodeGen/Mips/instverify/dinsm-pos-size.mir b/llvm/test/CodeGen/Mips/instverify/dinsm-pos-size.mir
index 0b8399724bd..bec2fc03431 100644
--- a/llvm/test/CodeGen/Mips/instverify/dinsm-pos-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dinsm-pos-size.mir
@@ -6,7 +6,7 @@
# Check that the machine verifier checks the pos + size is in the range 33..64
---
name: dinsu
-alignment: 3
+alignment: 8
exposesReturnsTwice: false
legalized: false
regBankSelected: false
diff --git a/llvm/test/CodeGen/Mips/instverify/dinsm-pos.mir b/llvm/test/CodeGen/Mips/instverify/dinsm-pos.mir
index 6f92d790c53..90dced0435d 100644
--- a/llvm/test/CodeGen/Mips/instverify/dinsm-pos.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dinsm-pos.mir
@@ -6,7 +6,7 @@
# Check that the machine verifier checks the position operand is in the range 0..31
---
name: dinsm
-alignment: 3
+alignment: 8
exposesReturnsTwice: false
legalized: false
regBankSelected: false
diff --git a/llvm/test/CodeGen/Mips/instverify/dinsm-size.mir b/llvm/test/CodeGen/Mips/instverify/dinsm-size.mir
index e7872360cb7..9c8c247f9ea 100644
--- a/llvm/test/CodeGen/Mips/instverify/dinsm-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dinsm-size.mir
@@ -6,7 +6,7 @@
# Check that the machine verifier checks the size operand is in the range 2..64
---
name: dinsm
-alignment: 3
+alignment: 8
exposesReturnsTwice: false
legalized: false
regBankSelected: false
diff --git a/llvm/test/CodeGen/Mips/instverify/dinsu-pos-size.mir b/llvm/test/CodeGen/Mips/instverify/dinsu-pos-size.mir
index 503199c50ad..4209a8ddf61 100644
--- a/llvm/test/CodeGen/Mips/instverify/dinsu-pos-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dinsu-pos-size.mir
@@ -6,7 +6,7 @@
# Check that the machine verifier checks the pos + size is in the range 33..64
---
name: dinsu
-alignment: 3
+alignment: 8
exposesReturnsTwice: false
legalized: false
regBankSelected: false
diff --git a/llvm/test/CodeGen/Mips/instverify/dinsu-pos.mir b/llvm/test/CodeGen/Mips/instverify/dinsu-pos.mir
index 2a81501d24a..7d4828d9294 100644
--- a/llvm/test/CodeGen/Mips/instverify/dinsu-pos.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dinsu-pos.mir
@@ -6,7 +6,7 @@
# Check that the machine verifier checks the position operand is in the range 32..63
---
name: dinsu
-alignment: 3
+alignment: 8
exposesReturnsTwice: false
legalized: false
regBankSelected: false
diff --git a/llvm/test/CodeGen/Mips/instverify/dinsu-size.mir b/llvm/test/CodeGen/Mips/instverify/dinsu-size.mir
index 198bd09d75f..d4c2f56c408 100644
--- a/llvm/test/CodeGen/Mips/instverify/dinsu-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dinsu-size.mir
@@ -6,7 +6,7 @@
# Check that the machine verifier checks the size operand is in the range 1..32
---
name: dinsu
-alignment: 3
+alignment: 8
exposesReturnsTwice: false
legalized: false
regBankSelected: false
diff --git a/llvm/test/CodeGen/Mips/instverify/ext-pos-size.mir b/llvm/test/CodeGen/Mips/instverify/ext-pos-size.mir
index b2f1cf02454..b9c1d6193c9 100644
--- a/llvm/test/CodeGen/Mips/instverify/ext-pos-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/ext-pos-size.mir
@@ -6,7 +6,7 @@
# Check that the machine verifier checks the pos + size is in the range 1..32
---
name: f
-alignment: 2
+alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
diff --git a/llvm/test/CodeGen/Mips/instverify/ext-pos.mir b/llvm/test/CodeGen/Mips/instverify/ext-pos.mir
index 69f817258a3..23cede00d31 100644
--- a/llvm/test/CodeGen/Mips/instverify/ext-pos.mir
+++ b/llvm/test/CodeGen/Mips/instverify/ext-pos.mir
@@ -6,7 +6,7 @@
# Check that the machine verifier checks the position operand is in the range 0..31
---
name: f
-alignment: 2
+alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
diff --git a/llvm/test/CodeGen/Mips/instverify/ext-size.mir b/llvm/test/CodeGen/Mips/instverify/ext-size.mir
index 460956ab46b..8b8ae45ded4 100644
--- a/llvm/test/CodeGen/Mips/instverify/ext-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/ext-size.mir
@@ -6,7 +6,7 @@
# Check that the machine verifier checks the size operand is in the range 1..32
---
name: f
-alignment: 2
+alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
diff --git a/llvm/test/CodeGen/Mips/instverify/ins-pos-size.mir b/llvm/test/CodeGen/Mips/instverify/ins-pos-size.mir
index b6202f5b3a9..9220bbdb747 100644
--- a/llvm/test/CodeGen/Mips/instverify/ins-pos-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/ins-pos-size.mir
@@ -6,7 +6,7 @@
# Check that the machine verifier checks the pos + size is in the range 1..32
---
name: f
-alignment: 2
+alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
diff --git a/llvm/test/CodeGen/Mips/instverify/ins-pos.mir b/llvm/test/CodeGen/Mips/instverify/ins-pos.mir
index 3b7fd0699c0..3932d174be9 100644
--- a/llvm/test/CodeGen/Mips/instverify/ins-pos.mir
+++ b/llvm/test/CodeGen/Mips/instverify/ins-pos.mir
@@ -6,7 +6,7 @@
# Check that the machine verifier checks the position operand is in the range 0..31
---
name: f
-alignment: 2
+alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
diff --git a/llvm/test/CodeGen/Mips/instverify/ins-size.mir b/llvm/test/CodeGen/Mips/instverify/ins-size.mir
index 0e17e20eed8..4f5348c2951 100644
--- a/llvm/test/CodeGen/Mips/instverify/ins-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/ins-size.mir
@@ -6,7 +6,7 @@
# Check that the machine verifier checks the size operand is in the range 1..32
---
name: f
-alignment: 2
+alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
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