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-rw-r--r--llvm/test/CodeGen/Mips/cconv/callee-saved-float.ll4
1 files changed, 0 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/Mips/cconv/callee-saved-float.ll b/llvm/test/CodeGen/Mips/cconv/callee-saved-float.ll
index 2aaa1b10a09..c84f0f439c2 100644
--- a/llvm/test/CodeGen/Mips/cconv/callee-saved-float.ll
+++ b/llvm/test/CodeGen/Mips/cconv/callee-saved-float.ll
@@ -17,7 +17,6 @@
; RUN: llc -march=mips64el -target-abi n64 < %s | FileCheck --check-prefix=ALL --check-prefix=N64 %s
; RUN: llc -march=mips64 -target-abi n64 < %s | FileCheck --check-prefix=ALL --check-prefix=ALL-INV --check-prefix=N64-INV %s
; RUN: llc -march=mips64el -target-abi n64 < %s | FileCheck --check-prefix=ALL --check-prefix=ALL-INV --check-prefix=N64-INV %s
-; RUN: llc -march=mips -mcpu=mips32r6 -mattr=micromips -filetype=obj < %s -o - | llvm-objdump -no-show-raw-insn -arch mips -mcpu=mips32r6 -mattr=micromips -d - | FileCheck --check-prefix=MM32R6 %s
; Test the the callee-saved registers are callee-saved as specified by section
; 2 of the MIPSpro N32 Handbook and section 3 of the SYSV ABI spec.
@@ -110,6 +109,3 @@ entry:
; N64-DAG: ldc1 [[F30]], [[OFF30]]($sp)
; N64-DAG: ldc1 [[F31]], [[OFF31]]($sp)
; N64: addiu $sp, $sp, 64
-
-; Check the mapping between LDC164 and LDC1_64_MMR6.
-; MM32R6: ldc1
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