diff options
Diffstat (limited to 'llvm/test/CodeGen/ARM/vldlane.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/vldlane.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/ARM/vldlane.ll b/llvm/test/CodeGen/ARM/vldlane.ll index a378555eedb..7a83a4c0cac 100644 --- a/llvm/test/CodeGen/ARM/vldlane.ll +++ b/llvm/test/CodeGen/ARM/vldlane.ll @@ -502,7 +502,7 @@ declare %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4lane.v4f32(i8*, <4 x flo ; we don't currently have a QQQQ_VFP2 super-regclass. (The "0" for the low ; part of %ins67 is supposed to be loaded by a VLDRS instruction in this test.) define <8 x i16> @test_qqqq_regsequence_subreg([6 x i64] %b) nounwind { -;CHECK: test_qqqq_regsequence_subreg +;CHECK-LABEL: test_qqqq_regsequence_subreg: ;CHECK: vld3.16 %tmp63 = extractvalue [6 x i64] %b, 5 %tmp64 = zext i64 %tmp63 to i128 |
