diff options
Diffstat (limited to 'llvm/test/CodeGen/ARM/2011-04-12-FastRegAlloc.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/2011-04-12-FastRegAlloc.ll | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/ARM/2011-04-12-FastRegAlloc.ll b/llvm/test/CodeGen/ARM/2011-04-12-FastRegAlloc.ll new file mode 100644 index 00000000000..eb23de0b971 --- /dev/null +++ b/llvm/test/CodeGen/ARM/2011-04-12-FastRegAlloc.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s -O0 -verify-machineinstrs -regalloc=fast +; Previously we'd crash as out of registers on this input by clobbering all of +; the aliases. +target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32" +target triple = "thumbv7-apple-darwin10.0.0" + +define void @_Z8TestCasev() nounwind ssp { +entry: + %a = alloca float, align 4 + %tmp = load float* %a, align 4 + call void asm sideeffect "", "w,~{s0},~{s16}"(float %tmp) nounwind, !srcloc !0 + ret void +} + +!0 = metadata !{i32 109} |
