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authorEric Christopher <echristo@apple.com>2011-04-18 19:26:25 +0000
committerEric Christopher <echristo@apple.com>2011-04-18 19:26:25 +0000
commitc37aa0b26a0489028c9e1c30949d766a33ba073e (patch)
tree2f2af85385656112f26af513b11be23b0c101797 /llvm/test/CodeGen/ARM/2011-04-12-FastRegAlloc.ll
parentd28977c7c2992501ec2dfcf159718536f0c6b951 (diff)
downloadbcm5719-llvm-c37aa0b26a0489028c9e1c30949d766a33ba073e.tar.gz
bcm5719-llvm-c37aa0b26a0489028c9e1c30949d766a33ba073e.zip
Fix a bug where we were counting the alias sets as completely used
registers for fast allocation a different way. This has us updating used registers only when we're using that exact register. Fixes rdar://9207598 llvm-svn: 129711
Diffstat (limited to 'llvm/test/CodeGen/ARM/2011-04-12-FastRegAlloc.ll')
-rw-r--r--llvm/test/CodeGen/ARM/2011-04-12-FastRegAlloc.ll15
1 files changed, 15 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/ARM/2011-04-12-FastRegAlloc.ll b/llvm/test/CodeGen/ARM/2011-04-12-FastRegAlloc.ll
new file mode 100644
index 00000000000..eb23de0b971
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/2011-04-12-FastRegAlloc.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -O0 -verify-machineinstrs -regalloc=fast
+; Previously we'd crash as out of registers on this input by clobbering all of
+; the aliases.
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32"
+target triple = "thumbv7-apple-darwin10.0.0"
+
+define void @_Z8TestCasev() nounwind ssp {
+entry:
+ %a = alloca float, align 4
+ %tmp = load float* %a, align 4
+ call void asm sideeffect "", "w,~{s0},~{s16}"(float %tmp) nounwind, !srcloc !0
+ ret void
+}
+
+!0 = metadata !{i32 109}
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