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-rw-r--r--llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sitofp.mir210
-rw-r--r--llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uitofp.mir210
-rw-r--r--llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir81
-rw-r--r--llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir81
-rw-r--r--llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sitofp.mir36
-rw-r--r--llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uitofp.mir36
6 files changed, 162 insertions, 492 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sitofp.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sitofp.mir
index 3f7917dca9e..3e0de2289aa 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sitofp.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sitofp.mir
@@ -102,213 +102,3 @@ body: |
%2:vgpr(s32) = G_ANYEXT %1
$vgpr0 = COPY %2
...
-
----
-name: sitofp_s1_to_s32_s_scc
-legalized: true
-regBankSelected: true
-tracksRegLiveness: true
-
-body: |
- bb.0:
- liveins: $sgpr0
-
- ; WAVE64-LABEL: name: sitofp_s1_to_s32_s_scc
- ; WAVE64: liveins: $sgpr0
- ; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
- ; WAVE64: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
- ; WAVE64: S_CMP_EQ_U32 [[COPY]], [[S_MOV_B32_]], implicit-def $scc
- ; WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY $scc
- ; WAVE64: $scc = COPY [[COPY1]]
- ; WAVE64: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 0, 3212836864, implicit $scc
- ; WAVE64: $sgpr0 = COPY [[S_CSELECT_B32_]]
- ; WAVE32-LABEL: name: sitofp_s1_to_s32_s_scc
- ; WAVE32: liveins: $sgpr0
- ; WAVE32: $vcc_hi = IMPLICIT_DEF
- ; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
- ; WAVE32: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
- ; WAVE32: S_CMP_EQ_U32 [[COPY]], [[S_MOV_B32_]], implicit-def $scc
- ; WAVE32: [[COPY1:%[0-9]+]]:sreg_32 = COPY $scc
- ; WAVE32: $scc = COPY [[COPY1]]
- ; WAVE32: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 0, 3212836864, implicit $scc
- ; WAVE32: $sgpr0 = COPY [[S_CSELECT_B32_]]
- %0:sgpr(s32) = COPY $sgpr0
- %1:sgpr(s32) = G_CONSTANT i32 0
- %2:scc(s1) = G_ICMP intpred(eq), %0, %1
- %3:sgpr(s32) = G_SITOFP %2
- $sgpr0 = COPY %3
-...
-
----
-name: sitofp_s1_to_s16_to_s_scc
-legalized: true
-regBankSelected: true
-tracksRegLiveness: true
-
-body: |
- bb.0:
- liveins: $sgpr0
-
- ; WAVE64-LABEL: name: sitofp_s1_to_s16_to_s_scc
- ; WAVE64: liveins: $sgpr0
- ; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
- ; WAVE64: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
- ; WAVE64: S_CMP_EQ_U32 [[COPY]], [[S_MOV_B32_]], implicit-def $scc
- ; WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY $scc
- ; WAVE64: $scc = COPY [[COPY1]]
- ; WAVE64: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 0, 48128, implicit $scc
- ; WAVE64: $sgpr0 = COPY [[S_CSELECT_B32_]]
- ; WAVE32-LABEL: name: sitofp_s1_to_s16_to_s_scc
- ; WAVE32: liveins: $sgpr0
- ; WAVE32: $vcc_hi = IMPLICIT_DEF
- ; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
- ; WAVE32: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
- ; WAVE32: S_CMP_EQ_U32 [[COPY]], [[S_MOV_B32_]], implicit-def $scc
- ; WAVE32: [[COPY1:%[0-9]+]]:sreg_32 = COPY $scc
- ; WAVE32: $scc = COPY [[COPY1]]
- ; WAVE32: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 0, 48128, implicit $scc
- ; WAVE32: $sgpr0 = COPY [[S_CSELECT_B32_]]
- %0:sgpr(s32) = COPY $sgpr0
- %1:sgpr(s32) = G_CONSTANT i32 0
- %2:scc(s1) = G_ICMP intpred(eq), %0, %1
- %3:sgpr(s16) = G_SITOFP %2
- %4:sgpr(s32) = G_ANYEXT %3
- $sgpr0 = COPY %4
-...
-
----
-name: sitofp_s1_to_s64_s_scc
-legalized: true
-regBankSelected: true
-tracksRegLiveness: true
-
-body: |
- bb.0:
- liveins: $sgpr0
-
- ; WAVE64-LABEL: name: sitofp_s1_to_s64_s_scc
- ; WAVE64: liveins: $sgpr0
- ; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
- ; WAVE64: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
- ; WAVE64: S_CMP_EQ_U32 [[COPY]], [[S_MOV_B32_]], implicit-def $scc
- ; WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY $scc
- ; WAVE64: $scc = COPY [[COPY1]]
- ; WAVE64: [[S_CSELECT_B64_:%[0-9]+]]:sreg_64_xexec = S_CSELECT_B64 0, -4616189618054758400, implicit $scc
- ; WAVE64: $sgpr0_sgpr1 = COPY [[S_CSELECT_B64_]]
- ; WAVE32-LABEL: name: sitofp_s1_to_s64_s_scc
- ; WAVE32: liveins: $sgpr0
- ; WAVE32: $vcc_hi = IMPLICIT_DEF
- ; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
- ; WAVE32: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
- ; WAVE32: S_CMP_EQ_U32 [[COPY]], [[S_MOV_B32_]], implicit-def $scc
- ; WAVE32: [[COPY1:%[0-9]+]]:sreg_32 = COPY $scc
- ; WAVE32: $scc = COPY [[COPY1]]
- ; WAVE32: [[S_CSELECT_B64_:%[0-9]+]]:sreg_64_xexec = S_CSELECT_B64 0, -4616189618054758400, implicit $scc
- ; WAVE32: $sgpr0_sgpr1 = COPY [[S_CSELECT_B64_]]
- %0:sgpr(s32) = COPY $sgpr0
- %1:sgpr(s32) = G_CONSTANT i32 0
- %2:scc(s1) = G_ICMP intpred(eq), %0, %1
- %3:sgpr(s64) = G_SITOFP %2
- $sgpr0_sgpr1 = COPY %3
-...
-
----
-name: sitofp_s1_to_s32_v_vcc
-legalized: true
-regBankSelected: true
-tracksRegLiveness: true
-
-body: |
- bb.0:
- liveins: $vgpr0
-
- ; WAVE64-LABEL: name: sitofp_s1_to_s32_v_vcc
- ; WAVE64: liveins: $vgpr0
- ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; WAVE64: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
- ; WAVE64: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[V_MOV_B32_e32_]], implicit $exec
- ; WAVE64: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 3212836864, [[V_CMP_EQ_U32_e64_]], implicit $exec
- ; WAVE64: $vgpr0 = COPY [[V_CNDMASK_B32_e64_]]
- ; WAVE32-LABEL: name: sitofp_s1_to_s32_v_vcc
- ; WAVE32: liveins: $vgpr0
- ; WAVE32: $vcc_hi = IMPLICIT_DEF
- ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; WAVE32: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
- ; WAVE32: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_32_xm0_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[V_MOV_B32_e32_]], implicit $exec
- ; WAVE32: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 3212836864, [[V_CMP_EQ_U32_e64_]], implicit $exec
- ; WAVE32: $vgpr0 = COPY [[V_CNDMASK_B32_e64_]]
- %0:vgpr(s32) = COPY $vgpr0
- %1:vgpr(s32) = G_CONSTANT i32 0
- %2:vcc(s1) = G_ICMP intpred(eq), %0, %1
- %3:vgpr(s32) = G_SITOFP %2
- $vgpr0 = COPY %3
-...
-
----
-name: sitofp_s1_to_s16_to_v_vcc
-legalized: true
-regBankSelected: true
-tracksRegLiveness: true
-
-body: |
- bb.0:
- liveins: $vgpr0
-
- ; WAVE64-LABEL: name: sitofp_s1_to_s16_to_v_vcc
- ; WAVE64: liveins: $vgpr0
- ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; WAVE64: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
- ; WAVE64: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[V_MOV_B32_e32_]], implicit $exec
- ; WAVE64: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 3212836864, [[V_CMP_EQ_U32_e64_]], implicit $exec
- ; WAVE64: [[V_CVT_F16_F32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F16_F32_e32 [[V_CNDMASK_B32_e64_]], implicit $exec
- ; WAVE64: $vgpr0 = COPY [[V_CVT_F16_F32_e32_]]
- ; WAVE32-LABEL: name: sitofp_s1_to_s16_to_v_vcc
- ; WAVE32: liveins: $vgpr0
- ; WAVE32: $vcc_hi = IMPLICIT_DEF
- ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; WAVE32: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
- ; WAVE32: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_32_xm0_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[V_MOV_B32_e32_]], implicit $exec
- ; WAVE32: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 3212836864, [[V_CMP_EQ_U32_e64_]], implicit $exec
- ; WAVE32: [[V_CVT_F16_F32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F16_F32_e32 [[V_CNDMASK_B32_e64_]], implicit $exec
- ; WAVE32: $vgpr0 = COPY [[V_CVT_F16_F32_e32_]]
- %0:vgpr(s32) = COPY $vgpr0
- %1:vgpr(s32) = G_CONSTANT i32 0
- %2:vcc(s1) = G_ICMP intpred(eq), %0, %1
- %3:vgpr(s16) = G_SITOFP %2
- %4:vgpr(s32) = G_ANYEXT %3
- $vgpr0 = COPY %4
-...
-
----
-name: sitofp_s1_to_s64_v_vcc
-legalized: true
-regBankSelected: true
-tracksRegLiveness: true
-
-body: |
- bb.0:
- liveins: $vgpr0
-
- ; WAVE64-LABEL: name: sitofp_s1_to_s64_v_vcc
- ; WAVE64: liveins: $vgpr0
- ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; WAVE64: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
- ; WAVE64: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[V_MOV_B32_e32_]], implicit $exec
- ; WAVE64: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, -1, [[V_CMP_EQ_U32_e64_]], implicit $exec
- ; WAVE64: [[V_CVT_F64_I32_e32_:%[0-9]+]]:vreg_64 = V_CVT_F64_I32_e32 [[V_CNDMASK_B32_e64_]], implicit $exec
- ; WAVE64: $vgpr0_vgpr1 = COPY [[V_CVT_F64_I32_e32_]]
- ; WAVE32-LABEL: name: sitofp_s1_to_s64_v_vcc
- ; WAVE32: liveins: $vgpr0
- ; WAVE32: $vcc_hi = IMPLICIT_DEF
- ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; WAVE32: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
- ; WAVE32: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_32_xm0_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[V_MOV_B32_e32_]], implicit $exec
- ; WAVE32: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, -1, [[V_CMP_EQ_U32_e64_]], implicit $exec
- ; WAVE32: [[V_CVT_F64_I32_e32_:%[0-9]+]]:vreg_64 = V_CVT_F64_I32_e32 [[V_CNDMASK_B32_e64_]], implicit $exec
- ; WAVE32: $vgpr0_vgpr1 = COPY [[V_CVT_F64_I32_e32_]]
- %0:vgpr(s32) = COPY $vgpr0
- %1:vgpr(s32) = G_CONSTANT i32 0
- %2:vcc(s1) = G_ICMP intpred(eq), %0, %1
- %3:vgpr(s64) = G_SITOFP %2
- $vgpr0_vgpr1 = COPY %3
-...
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uitofp.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uitofp.mir
index 7ae77a8d10d..d35f7c428a4 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uitofp.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uitofp.mir
@@ -111,213 +111,3 @@ body: |
%2:vgpr(s32) = G_ANYEXT %1
$vgpr0 = COPY %2
...
-
----
-name: uitofp_s1_to_s32_s_scc
-legalized: true
-regBankSelected: true
-tracksRegLiveness: true
-
-body: |
- bb.0:
- liveins: $sgpr0
-
- ; WAVE64-LABEL: name: uitofp_s1_to_s32_s_scc
- ; WAVE64: liveins: $sgpr0
- ; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
- ; WAVE64: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
- ; WAVE64: S_CMP_EQ_U32 [[COPY]], [[S_MOV_B32_]], implicit-def $scc
- ; WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY $scc
- ; WAVE64: $scc = COPY [[COPY1]]
- ; WAVE64: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 0, 1065353216, implicit $scc
- ; WAVE64: $sgpr0 = COPY [[S_CSELECT_B32_]]
- ; WAVE32-LABEL: name: uitofp_s1_to_s32_s_scc
- ; WAVE32: liveins: $sgpr0
- ; WAVE32: $vcc_hi = IMPLICIT_DEF
- ; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
- ; WAVE32: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
- ; WAVE32: S_CMP_EQ_U32 [[COPY]], [[S_MOV_B32_]], implicit-def $scc
- ; WAVE32: [[COPY1:%[0-9]+]]:sreg_32 = COPY $scc
- ; WAVE32: $scc = COPY [[COPY1]]
- ; WAVE32: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 0, 1065353216, implicit $scc
- ; WAVE32: $sgpr0 = COPY [[S_CSELECT_B32_]]
- %0:sgpr(s32) = COPY $sgpr0
- %1:sgpr(s32) = G_CONSTANT i32 0
- %2:scc(s1) = G_ICMP intpred(eq), %0, %1
- %3:sgpr(s32) = G_UITOFP %2
- $sgpr0 = COPY %3
-...
-
----
-name: uitofp_s1_to_s16_to_s_scc
-legalized: true
-regBankSelected: true
-tracksRegLiveness: true
-
-body: |
- bb.0:
- liveins: $sgpr0
-
- ; WAVE64-LABEL: name: uitofp_s1_to_s16_to_s_scc
- ; WAVE64: liveins: $sgpr0
- ; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
- ; WAVE64: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
- ; WAVE64: S_CMP_EQ_U32 [[COPY]], [[S_MOV_B32_]], implicit-def $scc
- ; WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY $scc
- ; WAVE64: $scc = COPY [[COPY1]]
- ; WAVE64: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 0, 15360, implicit $scc
- ; WAVE64: $sgpr0 = COPY [[S_CSELECT_B32_]]
- ; WAVE32-LABEL: name: uitofp_s1_to_s16_to_s_scc
- ; WAVE32: liveins: $sgpr0
- ; WAVE32: $vcc_hi = IMPLICIT_DEF
- ; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
- ; WAVE32: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
- ; WAVE32: S_CMP_EQ_U32 [[COPY]], [[S_MOV_B32_]], implicit-def $scc
- ; WAVE32: [[COPY1:%[0-9]+]]:sreg_32 = COPY $scc
- ; WAVE32: $scc = COPY [[COPY1]]
- ; WAVE32: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 0, 15360, implicit $scc
- ; WAVE32: $sgpr0 = COPY [[S_CSELECT_B32_]]
- %0:sgpr(s32) = COPY $sgpr0
- %1:sgpr(s32) = G_CONSTANT i32 0
- %2:scc(s1) = G_ICMP intpred(eq), %0, %1
- %3:sgpr(s16) = G_UITOFP %2
- %4:sgpr(s32) = G_ANYEXT %3
- $sgpr0 = COPY %4
-...
-
----
-name: uitofp_s1_to_s64_s_scc
-legalized: true
-regBankSelected: true
-tracksRegLiveness: true
-
-body: |
- bb.0:
- liveins: $sgpr0
-
- ; WAVE64-LABEL: name: uitofp_s1_to_s64_s_scc
- ; WAVE64: liveins: $sgpr0
- ; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
- ; WAVE64: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
- ; WAVE64: S_CMP_EQ_U32 [[COPY]], [[S_MOV_B32_]], implicit-def $scc
- ; WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY $scc
- ; WAVE64: $scc = COPY [[COPY1]]
- ; WAVE64: [[S_CSELECT_B64_:%[0-9]+]]:sreg_64_xexec = S_CSELECT_B64 0, 4607182418800017408, implicit $scc
- ; WAVE64: $sgpr0_sgpr1 = COPY [[S_CSELECT_B64_]]
- ; WAVE32-LABEL: name: uitofp_s1_to_s64_s_scc
- ; WAVE32: liveins: $sgpr0
- ; WAVE32: $vcc_hi = IMPLICIT_DEF
- ; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
- ; WAVE32: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
- ; WAVE32: S_CMP_EQ_U32 [[COPY]], [[S_MOV_B32_]], implicit-def $scc
- ; WAVE32: [[COPY1:%[0-9]+]]:sreg_32 = COPY $scc
- ; WAVE32: $scc = COPY [[COPY1]]
- ; WAVE32: [[S_CSELECT_B64_:%[0-9]+]]:sreg_64_xexec = S_CSELECT_B64 0, 4607182418800017408, implicit $scc
- ; WAVE32: $sgpr0_sgpr1 = COPY [[S_CSELECT_B64_]]
- %0:sgpr(s32) = COPY $sgpr0
- %1:sgpr(s32) = G_CONSTANT i32 0
- %2:scc(s1) = G_ICMP intpred(eq), %0, %1
- %3:sgpr(s64) = G_UITOFP %2
- $sgpr0_sgpr1 = COPY %3
-...
-
----
-name: uitofp_s1_to_s32_v_vcc
-legalized: true
-regBankSelected: true
-tracksRegLiveness: true
-
-body: |
- bb.0:
- liveins: $vgpr0
-
- ; WAVE64-LABEL: name: uitofp_s1_to_s32_v_vcc
- ; WAVE64: liveins: $vgpr0
- ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; WAVE64: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
- ; WAVE64: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[V_MOV_B32_e32_]], implicit $exec
- ; WAVE64: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1065353216, [[V_CMP_EQ_U32_e64_]], implicit $exec
- ; WAVE64: $vgpr0 = COPY [[V_CNDMASK_B32_e64_]]
- ; WAVE32-LABEL: name: uitofp_s1_to_s32_v_vcc
- ; WAVE32: liveins: $vgpr0
- ; WAVE32: $vcc_hi = IMPLICIT_DEF
- ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; WAVE32: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
- ; WAVE32: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_32_xm0_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[V_MOV_B32_e32_]], implicit $exec
- ; WAVE32: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1065353216, [[V_CMP_EQ_U32_e64_]], implicit $exec
- ; WAVE32: $vgpr0 = COPY [[V_CNDMASK_B32_e64_]]
- %0:vgpr(s32) = COPY $vgpr0
- %1:vgpr(s32) = G_CONSTANT i32 0
- %2:vcc(s1) = G_ICMP intpred(eq), %0, %1
- %3:vgpr(s32) = G_UITOFP %2
- $vgpr0 = COPY %3
-...
-
----
-name: uitofp_s1_to_s16_to_v_vcc
-legalized: true
-regBankSelected: true
-tracksRegLiveness: true
-
-body: |
- bb.0:
- liveins: $vgpr0
-
- ; WAVE64-LABEL: name: uitofp_s1_to_s16_to_v_vcc
- ; WAVE64: liveins: $vgpr0
- ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; WAVE64: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
- ; WAVE64: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[V_MOV_B32_e32_]], implicit $exec
- ; WAVE64: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1065353216, [[V_CMP_EQ_U32_e64_]], implicit $exec
- ; WAVE64: [[V_CVT_F16_F32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F16_F32_e32 [[V_CNDMASK_B32_e64_]], implicit $exec
- ; WAVE64: $vgpr0 = COPY [[V_CVT_F16_F32_e32_]]
- ; WAVE32-LABEL: name: uitofp_s1_to_s16_to_v_vcc
- ; WAVE32: liveins: $vgpr0
- ; WAVE32: $vcc_hi = IMPLICIT_DEF
- ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; WAVE32: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
- ; WAVE32: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_32_xm0_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[V_MOV_B32_e32_]], implicit $exec
- ; WAVE32: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1065353216, [[V_CMP_EQ_U32_e64_]], implicit $exec
- ; WAVE32: [[V_CVT_F16_F32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F16_F32_e32 [[V_CNDMASK_B32_e64_]], implicit $exec
- ; WAVE32: $vgpr0 = COPY [[V_CVT_F16_F32_e32_]]
- %0:vgpr(s32) = COPY $vgpr0
- %1:vgpr(s32) = G_CONSTANT i32 0
- %2:vcc(s1) = G_ICMP intpred(eq), %0, %1
- %3:vgpr(s16) = G_UITOFP %2
- %4:vgpr(s32) = G_ANYEXT %3
- $vgpr0 = COPY %4
-...
-
----
-name: uitofp_s1_to_s64_v_vcc
-legalized: true
-regBankSelected: true
-tracksRegLiveness: true
-
-body: |
- bb.0:
- liveins: $vgpr0
-
- ; WAVE64-LABEL: name: uitofp_s1_to_s64_v_vcc
- ; WAVE64: liveins: $vgpr0
- ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; WAVE64: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
- ; WAVE64: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[V_MOV_B32_e32_]], implicit $exec
- ; WAVE64: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_EQ_U32_e64_]], implicit $exec
- ; WAVE64: [[V_CVT_F64_U32_e32_:%[0-9]+]]:vreg_64 = V_CVT_F64_U32_e32 [[V_CNDMASK_B32_e64_]], implicit $exec
- ; WAVE64: $vgpr0_vgpr1 = COPY [[V_CVT_F64_U32_e32_]]
- ; WAVE32-LABEL: name: uitofp_s1_to_s64_v_vcc
- ; WAVE32: liveins: $vgpr0
- ; WAVE32: $vcc_hi = IMPLICIT_DEF
- ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; WAVE32: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
- ; WAVE32: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_32_xm0_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[V_MOV_B32_e32_]], implicit $exec
- ; WAVE32: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_EQ_U32_e64_]], implicit $exec
- ; WAVE32: [[V_CVT_F64_U32_e32_:%[0-9]+]]:vreg_64 = V_CVT_F64_U32_e32 [[V_CNDMASK_B32_e64_]], implicit $exec
- ; WAVE32: $vgpr0_vgpr1 = COPY [[V_CVT_F64_U32_e32_]]
- %0:vgpr(s32) = COPY $vgpr0
- %1:vgpr(s32) = G_CONSTANT i32 0
- %2:vcc(s1) = G_ICMP intpred(eq), %0, %1
- %3:vgpr(s64) = G_UITOFP %2
- $vgpr0_vgpr1 = COPY %3
-...
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir
index 7b50166c7a8..2eaa3c9b658 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir
@@ -384,3 +384,84 @@ body: |
%2:_(s64) = G_SITOFP %1
$vgpr0_vgpr1 = COPY %2
...
+
+---
+name: test_sitofp_s1_to_s16
+body: |
+ bb.0:
+ liveins: $vgpr0
+
+ ; GFX6-LABEL: name: test_sitofp_s1_to_s16
+ ; GFX6: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; GFX6: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)
+ ; GFX6: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xHBC00
+ ; GFX6: [[C1:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH0000
+ ; GFX6: [[SELECT:%[0-9]+]]:_(s16) = G_SELECT [[TRUNC]](s1), [[C]], [[C1]]
+ ; GFX6: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SELECT]](s16)
+ ; GFX6: $vgpr0 = COPY [[ANYEXT]](s32)
+ ; GFX8-LABEL: name: test_sitofp_s1_to_s16
+ ; GFX8: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; GFX8: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)
+ ; GFX8: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xHBC00
+ ; GFX8: [[C1:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH0000
+ ; GFX8: [[SELECT:%[0-9]+]]:_(s16) = G_SELECT [[TRUNC]](s1), [[C]], [[C1]]
+ ; GFX8: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SELECT]](s16)
+ ; GFX8: $vgpr0 = COPY [[ANYEXT]](s32)
+ %0:_(s32) = COPY $vgpr0
+ %1:_(s1) = G_TRUNC %0
+ %2:_(s16) = G_SITOFP %1
+ %3:_(s32) = G_ANYEXT %2
+ $vgpr0 = COPY %3
+...
+
+---
+name: test_sitofp_s1_to_s32
+body: |
+ bb.0:
+ liveins: $vgpr0
+
+ ; GFX6-LABEL: name: test_sitofp_s1_to_s32
+ ; GFX6: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; GFX6: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)
+ ; GFX6: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float -1.000000e+00
+ ; GFX6: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 0.000000e+00
+ ; GFX6: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[TRUNC]](s1), [[C]], [[C1]]
+ ; GFX6: $vgpr0 = COPY [[SELECT]](s32)
+ ; GFX8-LABEL: name: test_sitofp_s1_to_s32
+ ; GFX8: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; GFX8: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)
+ ; GFX8: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float -1.000000e+00
+ ; GFX8: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 0.000000e+00
+ ; GFX8: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[TRUNC]](s1), [[C]], [[C1]]
+ ; GFX8: $vgpr0 = COPY [[SELECT]](s32)
+ %0:_(s32) = COPY $vgpr0
+ %1:_(s1) = G_TRUNC %0
+ %2:_(s32) = G_SITOFP %1
+ $vgpr0 = COPY %2
+...
+
+---
+name: test_sitofp_s1_to_s64
+body: |
+ bb.0:
+ liveins: $vgpr0
+
+ ; GFX6-LABEL: name: test_sitofp_s1_to_s64
+ ; GFX6: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; GFX6: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)
+ ; GFX6: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double -1.000000e+00
+ ; GFX6: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 0.000000e+00
+ ; GFX6: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC]](s1), [[C]], [[C1]]
+ ; GFX6: $vgpr0_vgpr1 = COPY [[SELECT]](s64)
+ ; GFX8-LABEL: name: test_sitofp_s1_to_s64
+ ; GFX8: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; GFX8: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)
+ ; GFX8: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double -1.000000e+00
+ ; GFX8: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 0.000000e+00
+ ; GFX8: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC]](s1), [[C]], [[C1]]
+ ; GFX8: $vgpr0_vgpr1 = COPY [[SELECT]](s64)
+ %0:_(s32) = COPY $vgpr0
+ %1:_(s1) = G_TRUNC %0
+ %2:_(s64) = G_SITOFP %1
+ $vgpr0_vgpr1 = COPY %2
+...
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir
index a6ba07c4088..0b18f4264ff 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir
@@ -324,3 +324,84 @@ body: |
%2:_(s64) = G_UITOFP %1
$vgpr0_vgpr1 = COPY %2
...
+
+---
+name: test_uitofp_s1_to_s16
+body: |
+ bb.0:
+ liveins: $vgpr0
+
+ ; GFX6-LABEL: name: test_uitofp_s1_to_s16
+ ; GFX6: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; GFX6: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)
+ ; GFX6: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH3C00
+ ; GFX6: [[C1:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH0000
+ ; GFX6: [[SELECT:%[0-9]+]]:_(s16) = G_SELECT [[TRUNC]](s1), [[C]], [[C1]]
+ ; GFX6: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SELECT]](s16)
+ ; GFX6: $vgpr0 = COPY [[ANYEXT]](s32)
+ ; GFX8-LABEL: name: test_uitofp_s1_to_s16
+ ; GFX8: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; GFX8: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)
+ ; GFX8: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH3C00
+ ; GFX8: [[C1:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH0000
+ ; GFX8: [[SELECT:%[0-9]+]]:_(s16) = G_SELECT [[TRUNC]](s1), [[C]], [[C1]]
+ ; GFX8: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SELECT]](s16)
+ ; GFX8: $vgpr0 = COPY [[ANYEXT]](s32)
+ %0:_(s32) = COPY $vgpr0
+ %1:_(s1) = G_TRUNC %0
+ %2:_(s16) = G_UITOFP %1
+ %3:_(s32) = G_ANYEXT %2
+ $vgpr0 = COPY %3
+...
+
+---
+name: test_uitofp_s1_to_s32
+body: |
+ bb.0:
+ liveins: $vgpr0
+
+ ; GFX6-LABEL: name: test_uitofp_s1_to_s32
+ ; GFX6: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; GFX6: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)
+ ; GFX6: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+00
+ ; GFX6: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 0.000000e+00
+ ; GFX6: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[TRUNC]](s1), [[C]], [[C1]]
+ ; GFX6: $vgpr0 = COPY [[SELECT]](s32)
+ ; GFX8-LABEL: name: test_uitofp_s1_to_s32
+ ; GFX8: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; GFX8: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)
+ ; GFX8: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+00
+ ; GFX8: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 0.000000e+00
+ ; GFX8: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[TRUNC]](s1), [[C]], [[C1]]
+ ; GFX8: $vgpr0 = COPY [[SELECT]](s32)
+ %0:_(s32) = COPY $vgpr0
+ %1:_(s1) = G_TRUNC %0
+ %2:_(s32) = G_UITOFP %1
+ $vgpr0 = COPY %2
+...
+
+---
+name: test_uitofp_s1_to_s64
+body: |
+ bb.0:
+ liveins: $vgpr0
+
+ ; GFX6-LABEL: name: test_uitofp_s1_to_s64
+ ; GFX6: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; GFX6: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)
+ ; GFX6: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 1.000000e+00
+ ; GFX6: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 0.000000e+00
+ ; GFX6: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC]](s1), [[C]], [[C1]]
+ ; GFX6: $vgpr0_vgpr1 = COPY [[SELECT]](s64)
+ ; GFX8-LABEL: name: test_uitofp_s1_to_s64
+ ; GFX8: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; GFX8: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)
+ ; GFX8: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 1.000000e+00
+ ; GFX8: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 0.000000e+00
+ ; GFX8: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC]](s1), [[C]], [[C1]]
+ ; GFX8: $vgpr0_vgpr1 = COPY [[SELECT]](s64)
+ %0:_(s32) = COPY $vgpr0
+ %1:_(s1) = G_TRUNC %0
+ %2:_(s64) = G_UITOFP %1
+ $vgpr0_vgpr1 = COPY %2
+...
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sitofp.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sitofp.mir
index aedfc8d1c4d..e48292127d5 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sitofp.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sitofp.mir
@@ -29,39 +29,3 @@ body: |
%0:_(s32) = COPY $vgpr0
%1:_(s32) = G_SITOFP %0
...
-
----
-name: sitofp_s_s1
-legalized: true
-
-body: |
- bb.0:
- liveins: $sgpr0
- ; CHECK-LABEL: name: sitofp_s_s1
- ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
- ; CHECK: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0
- ; CHECK: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]]
- ; CHECK: [[SITOFP:%[0-9]+]]:vgpr(s32) = G_SITOFP [[ICMP]](s1)
- %0:_(s32) = COPY $sgpr0
- %1:_(s32) = G_CONSTANT i32 0
- %2:_(s1) = G_ICMP intpred(eq), %0, %1
- %3:_(s32) = G_SITOFP %2
-...
-
----
-name: sitofp_v_s1
-legalized: true
-
-body: |
- bb.0:
- liveins: $vgpr0
- ; CHECK-LABEL: name: sitofp_v_s1
- ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
- ; CHECK: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0
- ; CHECK: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]]
- ; CHECK: [[SITOFP:%[0-9]+]]:vgpr(s32) = G_SITOFP [[ICMP]](s1)
- %0:_(s32) = COPY $vgpr0
- %1:_(s32) = G_CONSTANT i32 0
- %2:_(s1) = G_ICMP intpred(eq), %0, %1
- %3:_(s32) = G_SITOFP %2
-...
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uitofp.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uitofp.mir
index bb0054bb25e..07f47c559a7 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uitofp.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uitofp.mir
@@ -29,39 +29,3 @@ body: |
%0:_(s32) = COPY $vgpr0
%1:_(s32) = G_UITOFP %0
...
-
----
-name: uitofp_s_s1
-legalized: true
-
-body: |
- bb.0:
- liveins: $sgpr0
- ; CHECK-LABEL: name: uitofp_s_s1
- ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
- ; CHECK: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0
- ; CHECK: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]]
- ; CHECK: [[UITOFP:%[0-9]+]]:vgpr(s32) = G_UITOFP [[ICMP]](s1)
- %0:_(s32) = COPY $sgpr0
- %1:_(s32) = G_CONSTANT i32 0
- %2:_(s1) = G_ICMP intpred(eq), %0, %1
- %3:_(s32) = G_UITOFP %2
-...
-
----
-name: uitofp_v_s1
-legalized: true
-
-body: |
- bb.0:
- liveins: $vgpr0
- ; CHECK-LABEL: name: uitofp_v_s1
- ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
- ; CHECK: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0
- ; CHECK: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]]
- ; CHECK: [[UITOFP:%[0-9]+]]:vgpr(s32) = G_UITOFP [[ICMP]](s1)
- %0:_(s32) = COPY $vgpr0
- %1:_(s32) = G_CONSTANT i32 0
- %2:_(s1) = G_ICMP intpred(eq), %0, %1
- %3:_(s32) = G_UITOFP %2
-...
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