diff options
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/build-vector-insert-elt-infloop.ll')
-rw-r--r-- | llvm/test/CodeGen/AMDGPU/build-vector-insert-elt-infloop.ll | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/build-vector-insert-elt-infloop.ll b/llvm/test/CodeGen/AMDGPU/build-vector-insert-elt-infloop.ll new file mode 100644 index 00000000000..865dccb2791 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/build-vector-insert-elt-infloop.ll @@ -0,0 +1,27 @@ +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s + +; There was an infinite loop in DAGCombiner from a target build_vector +; combine and a generic insert_vector_elt combine. + +; GCN-LABEL: {{^}}combine_loop: +; GCN: flat_load_ushort +; GCN: flat_store_short +; GCN: v_lshlrev_b32_e32 v{{[0-9]+}}, 16, +define amdgpu_kernel void @combine_loop(i16* %arg) #0 { +bb: + br label %bb1 + +bb1: + %tmp = phi <2 x i16> [ <i16 15360, i16 15360>, %bb ], [ %tmp5, %bb1 ] + %tmp2 = phi half [ 0xH0000, %bb ], [ %tmp8, %bb1 ] + %tmp3 = load volatile half, half* null, align 536870912 + %tmp4 = bitcast half %tmp3 to i16 + %tmp5 = insertelement <2 x i16> <i16 0, i16 undef>, i16 %tmp4, i32 1 + %tmp6 = bitcast i16* %arg to half* + store half %tmp2, half* %tmp6, align 2 + %tmp7 = bitcast <2 x i16> %tmp to <2 x half> + %tmp8 = extractelement <2 x half> %tmp7, i32 0 + br label %bb1 +} + +attributes #0 = { nounwind } |