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-rw-r--r--llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp10
1 files changed, 9 insertions, 1 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp b/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
index 5289063ca2b..9940a74d7a8 100644
--- a/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
@@ -611,7 +611,15 @@ AArch64RegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
if (!VReg)
break;
MachineInstr *DefMI = MRI.getVRegDef(VReg);
- if (isPreISelGenericFloatingPointOpcode(DefMI->getOpcode()))
+ unsigned DefOpc = DefMI->getOpcode();
+ if (isPreISelGenericFloatingPointOpcode(DefOpc) ||
+ // Check if we come from a copy-like instruction with
+ // floating point constraints. In that case, we are still
+ // fed by fp instructions, but indirectly
+ // (e.g., through ABI copies).
+ ((DefOpc == TargetOpcode::COPY || DefMI->isPHI()) &&
+ getRegBank(DefMI->getOperand(0).getReg(), MRI, TRI) ==
+ &AArch64::FPRRegBank))
OpRegBankIdx[0] = PMI_FirstFPR;
break;
}
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