1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/R600/SIFixSGPRCopies.cpp b/llvm/lib/Target/R600/SIFixSGPRCopies.cpp
index 435172a08ee..7f07b01f087 100644
--- a/llvm/lib/Target/R600/SIFixSGPRCopies.cpp
+++ b/llvm/lib/Target/R600/SIFixSGPRCopies.cpp
@@ -143,7 +143,7 @@ bool SIFixSGPRCopies::runOnMachineFunction(MachineFunction &MF) {
       }
       unsigned Reg = MI.getOperand(0).getReg();
       const TargetRegisterClass *RC = inferRegClass(TRI, MRI, Reg);
-      if (RC == &AMDGPU::VSrc_32RegClass) {
+      if (TRI->getCommonSubClass(RC, &AMDGPU::VReg_32RegClass)) {
         MRI.constrainRegClass(Reg, &AMDGPU::VReg_32RegClass);
       }
     }