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-rw-r--r--llvm/lib/Target/ARM/ARMInstrThumb2.td17
-rw-r--r--llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp16
2 files changed, 17 insertions, 16 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrThumb2.td b/llvm/lib/Target/ARM/ARMInstrThumb2.td
index cad35d3e4f8..1525cff080a 100644
--- a/llvm/lib/Target/ARM/ARMInstrThumb2.td
+++ b/llvm/lib/Target/ARM/ARMInstrThumb2.td
@@ -360,18 +360,19 @@ def addrmode_tbh : MemOperand {
// Define ARMv8.1-M specific addressing modes.
// Label operands for BF/BFL/WLS/DLS/LE
-class BFLabelOp<string signed, string isNeg, string size, string fixup>
+class BFLabelOp<string signed, string isNeg, string zeroPermitted, string size,
+ string fixup>
: Operand<OtherVT> {
let EncoderMethod = !strconcat("getBFTargetOpValue<", isNeg, ", ",
fixup, ">");
let OperandType = "OPERAND_PCREL";
let DecoderMethod = !strconcat("DecodeBFLabelOperand<", signed, ", ",
- isNeg, ", ", size, ">");
+ isNeg, ", ", zeroPermitted, ", ", size, ">");
}
-def bflabel_u4 : BFLabelOp<"false", "false", "4", "ARM::fixup_bf_branch">;
-def bflabel_s12 : BFLabelOp<"true", "false", "12", "ARM::fixup_bfc_target">;
-def bflabel_s16 : BFLabelOp<"true", "false", "16", "ARM::fixup_bf_target">;
-def bflabel_s18 : BFLabelOp<"true", "false", "18", "ARM::fixup_bfl_target">;
+def bflabel_u4 : BFLabelOp<"false", "false", "false", "4", "ARM::fixup_bf_branch">;
+def bflabel_s12 : BFLabelOp<"true", "false", "true", "12", "ARM::fixup_bfc_target">;
+def bflabel_s16 : BFLabelOp<"true", "false", "true", "16", "ARM::fixup_bf_target">;
+def bflabel_s18 : BFLabelOp<"true", "false", "true", "18", "ARM::fixup_bfl_target">;
def wlslabel_u11_asmoperand : AsmOperandClass {
let Name = "WLSLabel";
@@ -380,7 +381,7 @@ def wlslabel_u11_asmoperand : AsmOperandClass {
let DiagnosticString =
"loop end is out of range or not a positive multiple of 2";
}
-def wlslabel_u11 : BFLabelOp<"false", "false", "11", "ARM::fixup_wls"> {
+def wlslabel_u11 : BFLabelOp<"false", "false", "true", "11", "ARM::fixup_wls"> {
let ParserMatchClass = wlslabel_u11_asmoperand;
}
def lelabel_u11_asmoperand : AsmOperandClass {
@@ -390,7 +391,7 @@ def lelabel_u11_asmoperand : AsmOperandClass {
let DiagnosticString =
"loop start is out of range or not a negative multiple of 2";
}
-def lelabel_u11 : BFLabelOp<"false", "true", "11", "ARM::fixup_le"> {
+def lelabel_u11 : BFLabelOp<"false", "true", "true", "11", "ARM::fixup_le"> {
let ParserMatchClass = lelabel_u11_asmoperand;
}
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 548fb10fb3f..9fb2fa65fdd 100644
--- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -488,7 +488,7 @@ static DecodeStatus DecoderForMRRC2AndMCRR2(MCInst &Inst, unsigned Val,
static DecodeStatus DecodeForVMRSandVMSR(MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder);
-template <bool isSigned, bool isNeg, int size>
+template <bool isSigned, bool isNeg, bool zeroPermitted, int size>
static DecodeStatus DecodeBFLabelOperand(MCInst &Inst, unsigned val,
uint64_t Address, const void *Decoder);
static DecodeStatus DecodeBFAfterTargetOperand(MCInst &Inst, unsigned val,
@@ -5908,13 +5908,13 @@ static DecodeStatus DecodeForVMRSandVMSR(MCInst &Inst, unsigned Val,
return S;
}
-template <bool isSigned, bool isNeg, int size>
+template <bool isSigned, bool isNeg, bool zeroPermitted, int size>
static DecodeStatus DecodeBFLabelOperand(MCInst &Inst, unsigned Val,
uint64_t Address,
const void *Decoder) {
DecodeStatus S = MCDisassembler::Success;
- if (Val == 0)
- S = MCDisassembler::SoftFail;
+ if (Val == 0 && !zeroPermitted)
+ S = MCDisassembler::Fail;
uint64_t DecVal;
if (isSigned)
@@ -5965,8 +5965,8 @@ static DecodeStatus DecodeLOLoop(MCInst &Inst, unsigned Insn, uint64_t Address,
Inst.addOperand(MCOperand::createReg(ARM::LR));
LLVM_FALLTHROUGH;
case ARM::t2LE:
- if (!Check(S, DecodeBFLabelOperand<false, true, 11>(Inst, Imm, Address,
- Decoder)))
+ if (!Check(S, DecodeBFLabelOperand<false, true, true, 11>(
+ Inst, Imm, Address, Decoder)))
return MCDisassembler::Fail;
break;
case ARM::t2WLS:
@@ -5978,8 +5978,8 @@ static DecodeStatus DecodeLOLoop(MCInst &Inst, unsigned Insn, uint64_t Address,
if (!Check(S,
DecoderGPRRegisterClass(Inst, fieldFromInstruction(Insn, 16, 4),
Address, Decoder)) ||
- !Check(S, DecodeBFLabelOperand<false, false, 11>(Inst, Imm, Address,
- Decoder)))
+ !Check(S, DecodeBFLabelOperand<false, false, true, 11>(
+ Inst, Imm, Address, Decoder)))
return MCDisassembler::Fail;
break;
case ARM::t2DLS:
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