diff options
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPURegAsmNames.inc.cpp (renamed from llvm/lib/Target/AMDGPU/AMDGPURegAsmNames.inc) | 4 | ||||
-rw-r--r-- | llvm/lib/Target/AMDGPU/CMakeLists.txt | 1 | ||||
-rw-r--r-- | llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 3 |
3 files changed, 7 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegAsmNames.inc b/llvm/lib/Target/AMDGPU/AMDGPURegAsmNames.inc.cpp index 6e17aa3fbad..36d88f52910 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPURegAsmNames.inc +++ b/llvm/lib/Target/AMDGPU/AMDGPURegAsmNames.inc.cpp @@ -1,5 +1,7 @@ //===-- AMDGPURegAsmNames.inc - Register asm names ----------*- C++ -*-----===// +#ifdef AMDGPU_REG_ASM_NAMES + static const char *const VGPR32RegNames[] = { "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", @@ -347,3 +349,5 @@ static const char *const SGPR512RegNames[] = { "s[48:63]", "s[52:67]", "s[56:71]", "s[60:75]", "s[64:79]", "s[68:83]", "s[72:87]", "s[76:91]", "s[80:95]", "s[84:99]", "s[88:103]" }; + +#endif diff --git a/llvm/lib/Target/AMDGPU/CMakeLists.txt b/llvm/lib/Target/AMDGPU/CMakeLists.txt index cafce0164fa..e30844f082c 100644 --- a/llvm/lib/Target/AMDGPU/CMakeLists.txt +++ b/llvm/lib/Target/AMDGPU/CMakeLists.txt @@ -58,6 +58,7 @@ add_llvm_target(AMDGPUCodeGen AMDGPUISelLowering.cpp AMDGPUInstrInfo.cpp AMDGPUPromoteAlloca.cpp + AMDGPURegAsmNames.inc.cpp AMDGPURegisterInfo.cpp AMDGPUUnifyDivergentExitNodes.cpp GCNHazardRecognizer.cpp diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp index 122d62ff175..b611f28fcab 100644 --- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp @@ -1105,7 +1105,8 @@ void SIRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI, } StringRef SIRegisterInfo::getRegAsmName(unsigned Reg) const { - #include "AMDGPURegAsmNames.inc" + #define AMDGPU_REG_ASM_NAMES + #include "AMDGPURegAsmNames.inc.cpp" #define REG_RANGE(BeginReg, EndReg, RegTable) \ if (Reg >= BeginReg && Reg <= EndReg) { \ |