diff options
Diffstat (limited to 'llvm/lib/Target')
49 files changed, 227 insertions, 191 deletions
diff --git a/llvm/lib/Target/ARM/ARM.h b/llvm/lib/Target/ARM/ARM.h index fa177420163..63bb8f60738 100644 --- a/llvm/lib/Target/ARM/ARM.h +++ b/llvm/lib/Target/ARM/ARM.h @@ -91,7 +91,7 @@ inline static const char *ARMCondCodeToString(ARMCC::CondCodes CC) { FunctionPass *createARMISelDag(ARMTargetMachine &TM); FunctionPass *createARMCodePrinterPass(raw_ostream &O, ARMTargetMachine &TM, - bool Fast, bool Verbose); + unsigned OptLevel, bool Verbose); FunctionPass *createARMCodeEmitterPass(ARMTargetMachine &TM, MachineCodeEmitter &MCE); FunctionPass *createARMLoadStoreOptimizationPass(); diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp index 9b6e51267fb..a2ee52e30db 100644 --- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp +++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp @@ -138,35 +138,37 @@ const TargetAsmInfo *ARMTargetMachine::createTargetAsmInfo() const { // Pass Pipeline Configuration -bool ARMTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) { +bool ARMTargetMachine::addInstSelector(PassManagerBase &PM, unsigned OptLevel) { PM.add(createARMISelDag(*this)); return false; } -bool ARMTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) { +bool ARMTargetMachine::addPreEmitPass(PassManagerBase &PM, unsigned OptLevel) { // FIXME: temporarily disabling load / store optimization pass for Thumb mode. - if (!Fast && !DisableLdStOpti && !Subtarget.isThumb()) + if (OptLevel != 0 && !DisableLdStOpti && !Subtarget.isThumb()) PM.add(createARMLoadStoreOptimizationPass()); - if (!Fast && !DisableIfConversion && !Subtarget.isThumb()) + if (OptLevel != 0 && !DisableIfConversion && !Subtarget.isThumb()) PM.add(createIfConverterPass()); PM.add(createARMConstantIslandPass()); return true; } -bool ARMTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast, - bool Verbose, raw_ostream &Out) { +bool ARMTargetMachine::addAssemblyEmitter(PassManagerBase &PM, + unsigned OptLevel, + bool Verbose, + raw_ostream &Out) { // Output assembly language. assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(Out, *this, Fast, Verbose)); + PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); return false; } -bool ARMTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast, +bool ARMTargetMachine::addCodeEmitter(PassManagerBase &PM, unsigned OptLevel, bool DumpAsm, MachineCodeEmitter &MCE) { // FIXME: Move this to TargetJITInfo! if (DefRelocModel == Reloc::Default) @@ -177,20 +179,22 @@ bool ARMTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast, if (DumpAsm) { assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(errs(), *this, Fast, true)); + PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); } return false; } -bool ARMTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast, - bool DumpAsm, MachineCodeEmitter &MCE) { +bool ARMTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, + unsigned OptLevel, + bool DumpAsm, + MachineCodeEmitter &MCE) { // Machine code emitter pass for ARM. PM.add(createARMCodeEmitterPass(*this, MCE)); if (DumpAsm) { assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(errs(), *this, Fast, true)); + PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); } return false; diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.h b/llvm/lib/Target/ARM/ARMTargetMachine.h index 9a3d7ed5fef..cfb617867dc 100644 --- a/llvm/lib/Target/ARM/ARMTargetMachine.h +++ b/llvm/lib/Target/ARM/ARMTargetMachine.h @@ -41,7 +41,7 @@ protected: // set this functions to ctor pointer at startup time if they are linked in. typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, ARMTargetMachine &tm, - bool fast, bool verbose); + unsigned OptLevel, bool verbose); static AsmPrinterCtorFn AsmPrinterCtor; public: @@ -69,13 +69,13 @@ public: virtual const TargetAsmInfo *createTargetAsmInfo() const; // Pass Pipeline Configuration - virtual bool addInstSelector(PassManagerBase &PM, bool Fast); - virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast); - virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast, + virtual bool addInstSelector(PassManagerBase &PM, unsigned OptLevel); + virtual bool addPreEmitPass(PassManagerBase &PM, unsigned OptLevel); + virtual bool addAssemblyEmitter(PassManagerBase &PM, unsigned OptLevel, bool Verbose, raw_ostream &Out); - virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast, + virtual bool addCodeEmitter(PassManagerBase &PM, unsigned OptLevel, bool DumpAsm, MachineCodeEmitter &MCE); - virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast, + virtual bool addSimpleCodeEmitter(PassManagerBase &PM, unsigned OptLevel, bool DumpAsm, MachineCodeEmitter &MCE); }; diff --git a/llvm/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp b/llvm/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp index b3fa88eeaa5..6559a9d797f 100644 --- a/llvm/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp +++ b/llvm/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp @@ -80,9 +80,9 @@ namespace { /// True if asm printer is printing a series of CONSTPOOL_ENTRY. bool InCPMode; public: - ARMAsmPrinter(raw_ostream &O, TargetMachine &TM, - const TargetAsmInfo *T, bool F, bool V) - : AsmPrinter(O, TM, T, F, V), DW(0), MMI(NULL), AFI(NULL), MCP(NULL), + explicit ARMAsmPrinter(raw_ostream &O, TargetMachine &TM, + const TargetAsmInfo *T, unsigned OL, bool V) + : AsmPrinter(O, TM, T, OL, V), DW(0), MMI(NULL), AFI(NULL), MCP(NULL), InCPMode(false) { Subtarget = &TM.getSubtarget<ARMSubtarget>(); } @@ -1061,8 +1061,8 @@ bool ARMAsmPrinter::doFinalization(Module &M) { /// FunctionPass *llvm::createARMCodePrinterPass(raw_ostream &o, ARMTargetMachine &tm, - bool fast, bool verbose) { - return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose); + unsigned OptLevel, bool verbose) { + return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose); } namespace { diff --git a/llvm/lib/Target/Alpha/Alpha.h b/llvm/lib/Target/Alpha/Alpha.h index d93394aa6fa..994edaa24c6 100644 --- a/llvm/lib/Target/Alpha/Alpha.h +++ b/llvm/lib/Target/Alpha/Alpha.h @@ -26,7 +26,7 @@ namespace llvm { FunctionPass *createAlphaISelDag(AlphaTargetMachine &TM); FunctionPass *createAlphaCodePrinterPass(raw_ostream &OS, TargetMachine &TM, - bool Fast, bool Verbose); + unsigned OptLevel, bool Verbose); FunctionPass *createAlphaPatternInstructionSelector(TargetMachine &TM); FunctionPass *createAlphaCodeEmitterPass(AlphaTargetMachine &TM, MachineCodeEmitter &MCE); diff --git a/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp b/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp index cae91d8c4ef..7a876120382 100644 --- a/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp +++ b/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp @@ -76,31 +76,34 @@ AlphaTargetMachine::AlphaTargetMachine(const Module &M, const std::string &FS) // Pass Pipeline Configuration //===----------------------------------------------------------------------===// -bool AlphaTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) { +bool AlphaTargetMachine::addInstSelector(PassManagerBase &PM, + unsigned OptLevel) { PM.add(createAlphaISelDag(*this)); return false; } -bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) { +bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM, + unsigned OptLevel) { // Must run branch selection immediately preceding the asm printer PM.add(createAlphaBranchSelectionPass()); return false; } -bool AlphaTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast, +bool AlphaTargetMachine::addAssemblyEmitter(PassManagerBase &PM, + unsigned OptLevel, bool Verbose, raw_ostream &Out) { PM.add(createAlphaLLRPPass(*this)); - PM.add(createAlphaCodePrinterPass(Out, *this, Fast, Verbose)); + PM.add(createAlphaCodePrinterPass(Out, *this, OptLevel, Verbose)); return false; } -bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast, +bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM, unsigned OptLevel, bool DumpAsm, MachineCodeEmitter &MCE) { PM.add(createAlphaCodeEmitterPass(*this, MCE)); if (DumpAsm) - PM.add(createAlphaCodePrinterPass(errs(), *this, Fast, true)); + PM.add(createAlphaCodePrinterPass(errs(), *this, OptLevel, true)); return false; } bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, - bool Fast, bool DumpAsm, + unsigned OptLevel, bool DumpAsm, MachineCodeEmitter &MCE) { - return addCodeEmitter(PM, Fast, DumpAsm, MCE); + return addCodeEmitter(PM, OptLevel, DumpAsm, MCE); } diff --git a/llvm/lib/Target/Alpha/AlphaTargetMachine.h b/llvm/lib/Target/Alpha/AlphaTargetMachine.h index 9a03baef3fa..309c2e88775 100644 --- a/llvm/lib/Target/Alpha/AlphaTargetMachine.h +++ b/llvm/lib/Target/Alpha/AlphaTargetMachine.h @@ -58,13 +58,13 @@ public: static unsigned getModuleMatchQuality(const Module &M); // Pass Pipeline Configuration - virtual bool addInstSelector(PassManagerBase &PM, bool Fast); - virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast); - virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast, + virtual bool addInstSelector(PassManagerBase &PM, unsigned OptLevel); + virtual bool addPreEmitPass(PassManagerBase &PM, unsigned OptLevel); + virtual bool addAssemblyEmitter(PassManagerBase &PM, unsigned OptLevel, bool Verbose, raw_ostream &Out); - virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast, + virtual bool addCodeEmitter(PassManagerBase &PM, unsigned OptLevel, bool DumpAsm, MachineCodeEmitter &MCE); - virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast, + virtual bool addSimpleCodeEmitter(PassManagerBase &PM, unsigned OptLevel, bool DumpAsm, MachineCodeEmitter &MCE); }; diff --git a/llvm/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp b/llvm/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp index 0df7e809afe..292a380595f 100644 --- a/llvm/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp +++ b/llvm/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp @@ -36,9 +36,9 @@ namespace { /// Unique incrementer for label values for referencing Global values. /// - AlphaAsmPrinter(raw_ostream &o, TargetMachine &tm, - const TargetAsmInfo *T, bool F, bool V) - : AsmPrinter(o, tm, T, F, V) {} + explicit AlphaAsmPrinter(raw_ostream &o, TargetMachine &tm, + const TargetAsmInfo *T, unsigned OL, bool V) + : AsmPrinter(o, tm, T, OL, V) {} virtual const char *getPassName() const { return "Alpha Assembly Printer"; @@ -68,8 +68,9 @@ namespace { /// FunctionPass *llvm::createAlphaCodePrinterPass(raw_ostream &o, TargetMachine &tm, - bool fast, bool verbose) { - return new AlphaAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose); + unsigned OptLevel, + bool verbose) { + return new AlphaAsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose); } #include "AlphaGenAsmWriter.inc" diff --git a/llvm/lib/Target/CBackend/CBackend.cpp b/llvm/lib/Target/CBackend/CBackend.cpp index 8b2473b1bad..0a8e9df5231 100644 --- a/llvm/lib/Target/CBackend/CBackend.cpp +++ b/llvm/lib/Target/CBackend/CBackend.cpp @@ -3587,7 +3587,7 @@ void CWriter::visitExtractValueInst(ExtractValueInst &EVI) { bool CTargetMachine::addPassesToEmitWholeFile(PassManager &PM, raw_ostream &o, CodeGenFileType FileType, - bool Fast) { + unsigned OptLevel) { if (FileType != TargetMachine::AssemblyFile) return true; PM.add(createGCLoweringPass()); diff --git a/llvm/lib/Target/CBackend/CTargetMachine.h b/llvm/lib/Target/CBackend/CTargetMachine.h index a17df050257..a851486a205 100644 --- a/llvm/lib/Target/CBackend/CTargetMachine.h +++ b/llvm/lib/Target/CBackend/CTargetMachine.h @@ -27,7 +27,8 @@ struct CTargetMachine : public TargetMachine { virtual bool WantsWholeFile() const { return true; } virtual bool addPassesToEmitWholeFile(PassManager &PM, raw_ostream &Out, - CodeGenFileType FileType, bool Fast); + CodeGenFileType FileType, + unsigned OptLevel); // This class always works, but must be requested explicitly on // llc command line. diff --git a/llvm/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp b/llvm/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp index 788f737f355..6e77c87e6ff 100644 --- a/llvm/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp +++ b/llvm/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp @@ -48,9 +48,9 @@ namespace { class VISIBILITY_HIDDEN SPUAsmPrinter : public AsmPrinter { std::set<std::string> FnStubs, GVStubs; public: - SPUAsmPrinter(raw_ostream &O, TargetMachine &TM, - const TargetAsmInfo *T, bool F, bool V) : - AsmPrinter(O, TM, T, F, V) {} + explicit SPUAsmPrinter(raw_ostream &O, TargetMachine &TM, + const TargetAsmInfo *T, unsigned OL, bool V) : + AsmPrinter(O, TM, T, OL, V) {} virtual const char *getPassName() const { return "STI CBEA SPU Assembly Printer"; @@ -615,6 +615,6 @@ bool LinuxAsmPrinter::doFinalization(Module &M) { /// FunctionPass *llvm::createSPUAsmPrinterPass(raw_ostream &o, SPUTargetMachine &tm, - bool fast, bool verbose) { - return new LinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose); + unsigned OptLevel, bool verbose) { + return new LinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose); } diff --git a/llvm/lib/Target/CellSPU/SPU.h b/llvm/lib/Target/CellSPU/SPU.h index 9bb199a16e1..5c62bc3a42a 100644 --- a/llvm/lib/Target/CellSPU/SPU.h +++ b/llvm/lib/Target/CellSPU/SPU.h @@ -25,7 +25,7 @@ namespace llvm { FunctionPass *createSPUISelDag(SPUTargetMachine &TM); FunctionPass *createSPUAsmPrinterPass(raw_ostream &o, SPUTargetMachine &tm, - bool fast, bool verbose); + unsigned OptLevel, bool verbose); /*--== Utility functions/predicates/etc used all over the place: --==*/ //! Predicate test for a signed 10-bit value diff --git a/llvm/lib/Target/CellSPU/SPUTargetMachine.cpp b/llvm/lib/Target/CellSPU/SPUTargetMachine.cpp index 5e69927356c..c8cf3643f59 100644 --- a/llvm/lib/Target/CellSPU/SPUTargetMachine.cpp +++ b/llvm/lib/Target/CellSPU/SPUTargetMachine.cpp @@ -81,15 +81,17 @@ SPUTargetMachine::SPUTargetMachine(const Module &M, const std::string &FS) //===----------------------------------------------------------------------===// bool -SPUTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) +SPUTargetMachine::addInstSelector(PassManagerBase &PM, unsigned OptLevel) { // Install an instruction selector. PM.add(createSPUISelDag(*this)); return false; } -bool SPUTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast, - bool Verbose, raw_ostream &Out) { - PM.add(createSPUAsmPrinterPass(Out, *this, Fast, Verbose)); +bool SPUTargetMachine::addAssemblyEmitter(PassManagerBase &PM, + unsigned OptLevel, + bool Verbose, + raw_ostream &Out) { + PM.add(createSPUAsmPrinterPass(Out, *this, OptLevel, Verbose)); return false; } diff --git a/llvm/lib/Target/CellSPU/SPUTargetMachine.h b/llvm/lib/Target/CellSPU/SPUTargetMachine.h index 32eb7f23427..e959e9187bc 100644 --- a/llvm/lib/Target/CellSPU/SPUTargetMachine.h +++ b/llvm/lib/Target/CellSPU/SPUTargetMachine.h @@ -83,9 +83,9 @@ public: } // Pass Pipeline Configuration - virtual bool addInstSelector(PassManagerBase &PM, bool /*Fast*/); - virtual bool addAssemblyEmitter(PassManagerBase &PM, bool /*Fast*/, - bool /*Verbose*/, raw_ostream &Out); + virtual bool addInstSelector(PassManagerBase &PM, unsigned OptLevel); + virtual bool addAssemblyEmitter(PassManagerBase &PM, unsigned OptLevel, + bool Verbose, raw_ostream &Out); }; } // end namespace llvm diff --git a/llvm/lib/Target/CppBackend/CPPBackend.cpp b/llvm/lib/Target/CppBackend/CPPBackend.cpp index e89d5f9ddd1..3d6362145e2 100644 --- a/llvm/lib/Target/CppBackend/CPPBackend.cpp +++ b/llvm/lib/Target/CppBackend/CPPBackend.cpp @@ -1995,7 +1995,7 @@ char CppWriter::ID = 0; bool CPPTargetMachine::addPassesToEmitWholeFile(PassManager &PM, raw_ostream &o, CodeGenFileType FileType, - bool Fast) { + unsigned OptLevel) { if (FileType != TargetMachine::AssemblyFile) return true; PM.add(new CppWriter(o)); return false; diff --git a/llvm/lib/Target/CppBackend/CPPTargetMachine.h b/llvm/lib/Target/CppBackend/CPPTargetMachine.h index db17c17826b..90b8268888a 100644 --- a/llvm/lib/Target/CppBackend/CPPTargetMachine.h +++ b/llvm/lib/Target/CppBackend/CPPTargetMachine.h @@ -29,7 +29,8 @@ struct CPPTargetMachine : public TargetMachine { virtual bool WantsWholeFile() const { return true; } virtual bool addPassesToEmitWholeFile(PassManager &PM, raw_ostream &Out, - CodeGenFileType FileType, bool Fast); + CodeGenFileType FileType, + unsigned OptLevel); // This class always works, but shouldn't be the default in most cases. static unsigned getModuleMatchQuality(const Module &M) { return 1; } diff --git a/llvm/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp b/llvm/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp index 2e9f5e67c08..5fd8811285a 100644 --- a/llvm/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp +++ b/llvm/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp @@ -37,9 +37,9 @@ namespace { class IA64AsmPrinter : public AsmPrinter { std::set<std::string> ExternalFunctionNames, ExternalObjectNames; public: - IA64AsmPrinter(raw_ostream &O, TargetMachine &TM, - const TargetAsmInfo *T, bool F, bool V) - : AsmPrinter(O, TM, T, F, V) {} + explicit IA64AsmPrinter(raw_ostream &O, TargetMachine &TM, + const TargetAsmInfo *T, unsigned OL, bool V) + : AsmPrinter(O, TM, T, OL, V) {} virtual const char *getPassName() const { return "IA64 Assembly Printer"; @@ -370,6 +370,7 @@ bool IA64AsmPrinter::doFinalization(Module &M) { /// FunctionPass *llvm::createIA64CodePrinterPass(raw_ostream &o, IA64TargetMachine &tm, - bool fast, bool verbose) { - return new IA64AsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose); + unsigned OptLevel, + bool verbose) { + return new IA64AsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose); } diff --git a/llvm/lib/Target/IA64/IA64.h b/llvm/lib/Target/IA64/IA64.h index 9b31e258a20..46c26f0a5aa 100644 --- a/llvm/lib/Target/IA64/IA64.h +++ b/llvm/lib/Target/IA64/IA64.h @@ -37,7 +37,7 @@ FunctionPass *createIA64BundlingPass(IA64TargetMachine &TM); /// FunctionPass *createIA64CodePrinterPass(raw_ostream &o, IA64TargetMachine &tm, - bool fast, bool verbose); + unsigned OptLevel, bool verbose); } // End llvm namespace diff --git a/llvm/lib/Target/IA64/IA64TargetMachine.cpp b/llvm/lib/Target/IA64/IA64TargetMachine.cpp index 58ae27a75e3..c472657c6e3 100644 --- a/llvm/lib/Target/IA64/IA64TargetMachine.cpp +++ b/llvm/lib/Target/IA64/IA64TargetMachine.cpp @@ -72,19 +72,21 @@ IA64TargetMachine::IA64TargetMachine(const Module &M, const std::string &FS) // Pass Pipeline Configuration //===----------------------------------------------------------------------===// -bool IA64TargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) { +bool IA64TargetMachine::addInstSelector(PassManagerBase &PM, unsigned OptLEvel){ PM.add(createIA64DAGToDAGInstructionSelector(*this)); return false; } -bool IA64TargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) { +bool IA64TargetMachine::addPreEmitPass(PassManagerBase &PM, unsigned OptLevel) { // Make sure everything is bundled happily PM.add(createIA64BundlingPass(*this)); return true; } -bool IA64TargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast, - bool Verbose, raw_ostream &Out) { - PM.add(createIA64CodePrinterPass(Out, *this, Fast, Verbose)); +bool IA64TargetMachine::addAssemblyEmitter(PassManagerBase &PM, + unsigned OptLevel, + bool Verbose, + raw_ostream &Out) { + PM.add(createIA64CodePrinterPass(Out, *this, OptLevel, Verbose)); return false; } diff --git a/llvm/lib/Target/IA64/IA64TargetMachine.h b/llvm/lib/Target/IA64/IA64TargetMachine.h index 2066e698ae9..1fbba02da38 100644 --- a/llvm/lib/Target/IA64/IA64TargetMachine.h +++ b/llvm/lib/Target/IA64/IA64TargetMachine.h @@ -51,9 +51,9 @@ public: static unsigned getModuleMatchQuality(const Module &M); // Pass Pipeline Configuration - virtual bool addInstSelector(PassManagerBase &PM, bool Fast); - virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast); - virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast, + virtual bool addInstSelector(PassManagerBase &PM, unsigned OptLevel); + virtual bool addPreEmitPass(PassManagerBase &PM, unsigned OptLevel); + virtual bool addAssemblyEmitter(PassManagerBase &PM, unsigned OptLevel, bool Verbose, raw_ostream &Out); }; } // End llvm namespace diff --git a/llvm/lib/Target/MSIL/MSILWriter.cpp b/llvm/lib/Target/MSIL/MSILWriter.cpp index 6b572f35a53..8d9a1ea7edc 100644 --- a/llvm/lib/Target/MSIL/MSILWriter.cpp +++ b/llvm/lib/Target/MSIL/MSILWriter.cpp @@ -35,7 +35,8 @@ namespace { virtual bool WantsWholeFile() const { return true; } virtual bool addPassesToEmitWholeFile(PassManager &PM, raw_ostream &Out, - CodeGenFileType FileType, bool Fast); + CodeGenFileType FileType, + unsigned OptLevel); // This class always works, but shouldn't be the default in most cases. static unsigned getModuleMatchQuality(const Module &M) { return 1; } @@ -1662,7 +1663,8 @@ void MSILWriter::printExternals() { //===----------------------------------------------------------------------===// bool MSILTarget::addPassesToEmitWholeFile(PassManager &PM, raw_ostream &o, - CodeGenFileType FileType, bool Fast) + CodeGenFileType FileType, + unsigned OptLevel) { if (FileType != TargetMachine::AssemblyFile) return true; MSILWriter* Writer = new MSILWriter(o); diff --git a/llvm/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp b/llvm/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp index 532c82df06f..6692f2e40ad 100644 --- a/llvm/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp +++ b/llvm/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp @@ -49,9 +49,9 @@ namespace { class VISIBILITY_HIDDEN MipsAsmPrinter : public AsmPrinter { const MipsSubtarget *Subtarget; public: - MipsAsmPrinter(raw_ostream &O, MipsTargetMachine &TM, - const TargetAsmInfo *T, bool F, bool V) - : AsmPrinter(O, TM, T, F, V) { + explicit MipsAsmPrinter(raw_ostream &O, MipsTargetMachine &TM, + const TargetAsmInfo *T, unsigned OL, bool V) + : AsmPrinter(O, TM, T, OL, V) { Subtarget = &TM.getSubtarget<MipsSubtarget>(); } @@ -91,8 +91,8 @@ namespace { /// regardless of whether the function is in SSA form. FunctionPass *llvm::createMipsCodePrinterPass(raw_ostream &o, MipsTargetMachine &tm, - bool fast, bool verbose) { - return new MipsAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose); + unsigned OptLevel, bool verbose) { + return new MipsAsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose); } //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/Mips/Mips.h b/llvm/lib/Target/Mips/Mips.h index e6e4c85286d..abcb9c44fae 100644 --- a/llvm/lib/Target/Mips/Mips.h +++ b/llvm/lib/Target/Mips/Mips.h @@ -25,7 +25,7 @@ namespace llvm { FunctionPass *createMipsDelaySlotFillerPass(MipsTargetMachine &TM); FunctionPass *createMipsCodePrinterPass(raw_ostream &OS, MipsTargetMachine &TM, - bool Fast, bool Verbose); + unsigned OptLevel, bool Verbose); } // end namespace llvm; // Defines symbolic names for Mips registers. This defines a mapping from diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/llvm/lib/Target/Mips/MipsTargetMachine.cpp index c4364a33d82..69a480deab8 100644 --- a/llvm/lib/Target/Mips/MipsTargetMachine.cpp +++ b/llvm/lib/Target/Mips/MipsTargetMachine.cpp @@ -105,7 +105,7 @@ getModuleMatchQuality(const Module &M) // Install an instruction selector pass using // the ISelDag to gen Mips code. bool MipsTargetMachine:: -addInstSelector(PassManagerBase &PM, bool Fast) +addInstSelector(PassManagerBase &PM, unsigned OptLevel) { PM.add(createMipsISelDag(*this)); return false; @@ -115,7 +115,7 @@ addInstSelector(PassManagerBase &PM, bool Fast) // machine code is emitted. return true if -print-machineinstrs should // print out the code after the passes. bool MipsTargetMachine:: -addPreEmitPass(PassManagerBase &PM, bool Fast) +addPreEmitPass(PassManagerBase &PM, unsigned OptLevel) { PM.add(createMipsDelaySlotFillerPass(*this)); return true; @@ -124,10 +124,10 @@ addPreEmitPass(PassManagerBase &PM, bool Fast) // Implements the AssemblyEmitter for the target. Must return // true if AssemblyEmitter is supported bool MipsTargetMachine:: -addAssemblyEmitter(PassManagerBase &PM, bool Fast, +addAssemblyEmitter(PassManagerBase &PM, unsigned OptLevel, bool Verbose, raw_ostream &Out) { // Output assembly language. - PM.add(createMipsCodePrinterPass(Out, *this, Fast, Verbose)); + PM.add(createMipsCodePrinterPass(Out, *this, OptLevel, Verbose)); return false; } diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.h b/llvm/lib/Target/Mips/MipsTargetMachine.h index 95f8e023b51..b5dc058e9ea 100644 --- a/llvm/lib/Target/Mips/MipsTargetMachine.h +++ b/llvm/lib/Target/Mips/MipsTargetMachine.h @@ -57,9 +57,9 @@ namespace llvm { static unsigned getModuleMatchQuality(const Module &M); // Pass Pipeline Configuration - virtual bool addInstSelector(PassManagerBase &PM, bool Fast); - virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast); - virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast, + virtual bool addInstSelector(PassManagerBase &PM, unsigned OptLevel); + virtual bool addPreEmitPass(PassManagerBase &PM, unsigned OptLevel); + virtual bool addAssemblyEmitter(PassManagerBase &PM, unsigned OptLevel, bool Verbose, raw_ostream &Out); }; diff --git a/llvm/lib/Target/PIC16/PIC16.h b/llvm/lib/Target/PIC16/PIC16.h index 786081dc1d2..695fe84aca6 100644 --- a/llvm/lib/Target/PIC16/PIC16.h +++ b/llvm/lib/Target/PIC16/PIC16.h @@ -75,7 +75,7 @@ namespace PIC16CC { FunctionPass *createPIC16ISelDag(PIC16TargetMachine &TM); FunctionPass *createPIC16CodePrinterPass(raw_ostream &OS, PIC16TargetMachine &TM, - bool Fast, bool Verbose); + unsigned OptLevel, bool Verbose); } // end namespace llvm; // Defines symbolic names for PIC16 registers. This defines a mapping from diff --git a/llvm/lib/Target/PIC16/PIC16AsmPrinter.cpp b/llvm/lib/Target/PIC16/PIC16AsmPrinter.cpp index 549e2d9b471..a10fcd40b0b 100644 --- a/llvm/lib/Target/PIC16/PIC16AsmPrinter.cpp +++ b/llvm/lib/Target/PIC16/PIC16AsmPrinter.cpp @@ -161,8 +161,9 @@ bool PIC16AsmPrinter::runOnMachineFunction(MachineFunction &MF) { /// FunctionPass *llvm::createPIC16CodePrinterPass(raw_ostream &o, PIC16TargetMachine &tm, - bool fast, bool verbose) { - return new PIC16AsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose); + unsigned OptLevel, + bool verbose) { + return new PIC16AsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose); } void PIC16AsmPrinter::printOperand(const MachineInstr *MI, int opNum) { diff --git a/llvm/lib/Target/PIC16/PIC16AsmPrinter.h b/llvm/lib/Target/PIC16/PIC16AsmPrinter.h index d9f81bd991d..67eca1f5905 100644 --- a/llvm/lib/Target/PIC16/PIC16AsmPrinter.h +++ b/llvm/lib/Target/PIC16/PIC16AsmPrinter.h @@ -24,9 +24,9 @@ namespace llvm { struct VISIBILITY_HIDDEN PIC16AsmPrinter : public AsmPrinter { - PIC16AsmPrinter(raw_ostream &O, PIC16TargetMachine &TM, - const TargetAsmInfo *T, bool F, bool V) - : AsmPrinter(O, TM, T, F, V) { + explicit PIC16AsmPrinter(raw_ostream &O, PIC16TargetMachine &TM, + const TargetAsmInfo *T, unsigned OL, bool V) + : AsmPrinter(O, TM, T, OL, V) { CurBank = ""; FunctionLabelBegin = '@'; IsRomData = false; diff --git a/llvm/lib/Target/PIC16/PIC16TargetMachine.cpp b/llvm/lib/Target/PIC16/PIC16TargetMachine.cpp index a8d92490e7b..adc2120a40b 100644 --- a/llvm/lib/Target/PIC16/PIC16TargetMachine.cpp +++ b/llvm/lib/Target/PIC16/PIC16TargetMachine.cpp @@ -55,17 +55,18 @@ const TargetAsmInfo *PIC16TargetMachine::createTargetAsmInfo() const { return new PIC16TargetAsmInfo(*this); } -bool PIC16TargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) { +bool PIC16TargetMachine::addInstSelector(PassManagerBase &PM, + unsigned OptLevel) { // Install an instruction selector. PM.add(createPIC16ISelDag(*this)); return false; } bool PIC16TargetMachine:: -addAssemblyEmitter(PassManagerBase &PM, bool Fast, bool Verbose, +addAssemblyEmitter(PassManagerBase &PM, unsigned OptLevel, bool Verbose, raw_ostream &Out) { // Output assembly language. - PM.add(createPIC16CodePrinterPass(Out, *this, Fast, Verbose)); + PM.add(createPIC16CodePrinterPass(Out, *this, OptLevel, Verbose)); return false; } diff --git a/llvm/lib/Target/PIC16/PIC16TargetMachine.h b/llvm/lib/Target/PIC16/PIC16TargetMachine.h index 0ac358f0bdc..b6b5d31848a 100644 --- a/llvm/lib/Target/PIC16/PIC16TargetMachine.h +++ b/llvm/lib/Target/PIC16/PIC16TargetMachine.h @@ -57,8 +57,8 @@ public: return const_cast<PIC16TargetLowering*>(&TLInfo); } - virtual bool addInstSelector(PassManagerBase &PM, bool Fast); - virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast, + virtual bool addInstSelector(PassManagerBase &PM, unsigned OptLevel); + virtual bool addAssemblyEmitter(PassManagerBase &PM, unsigned OptLevel, bool Verbose, raw_ostream &Out); }; // PIC16TargetMachine. diff --git a/llvm/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp index 5b68062ab10..c690982751b 100644 --- a/llvm/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp +++ b/llvm/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp @@ -54,9 +54,9 @@ namespace { StringSet<> FnStubs, GVStubs, HiddenGVStubs; const PPCSubtarget &Subtarget; public: - PPCAsmPrinter(raw_ostream &O, TargetMachine &TM, - const TargetAsmInfo *T, bool F, bool V) - : AsmPrinter(O, TM, T, F, V), + explicit PPCAsmPrinter(raw_ostream &O, TargetMachine &TM, + const TargetAsmInfo *T, unsigned OL, bool V) + : AsmPrinter(O, TM, T, OL, V), Subtarget(TM.getSubtarget<PPCSubtarget>()) {} virtual const char *getPassName() const { @@ -297,9 +297,9 @@ namespace { DwarfWriter *DW; MachineModuleInfo *MMI; public: - PPCLinuxAsmPrinter(raw_ostream &O, PPCTargetMachine &TM, - const TargetAsmInfo *T, bool F, bool V) - : PPCAsmPrinter(O, TM, T, F, V), DW(0), MMI(0) {} + explicit PPCLinuxAsmPrinter(raw_ostream &O, PPCTargetMachine &TM, + const TargetAsmInfo *T, unsigned OL, bool V) + : PPCAsmPrinter(O, TM, T, OL, V), DW(0), MMI(0) {} virtual const char *getPassName() const { return "Linux PPC Assembly Printer"; @@ -326,9 +326,9 @@ namespace { MachineModuleInfo *MMI; raw_ostream &OS; public: - PPCDarwinAsmPrinter(raw_ostream &O, PPCTargetMachine &TM, - const TargetAsmInfo *T, bool F, bool V) - : PPCAsmPrinter(O, TM, T, F, V), DW(0), MMI(0), OS(O) {} + explicit PPCDarwinAsmPrinter(raw_ostream &O, PPCTargetMachine &TM, + const TargetAsmInfo *T, unsigned OL, bool V) + : PPCAsmPrinter(O, TM, T, OL, V), DW(0), MMI(0), OS(O) {} virtual const char *getPassName() const { return "Darwin PPC Assembly Printer"; @@ -1176,13 +1176,15 @@ bool PPCDarwinAsmPrinter::doFinalization(Module &M) { /// FunctionPass *llvm::createPPCAsmPrinterPass(raw_ostream &o, PPCTargetMachine &tm, - bool fast, bool verbose) { + unsigned OptLevel, bool verbose) { const PPCSubtarget *Subtarget = &tm.getSubtarget<PPCSubtarget>(); if (Subtarget->isDarwin()) { - return new PPCDarwinAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose); + return new PPCDarwinAsmPrinter(o, tm, tm.getTargetAsmInfo(), + OptLevel, verbose); } else { - return new PPCLinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose); + return new PPCLinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), + OptLevel, verbose); } } diff --git a/llvm/lib/Target/PowerPC/PPC.h b/llvm/lib/Target/PowerPC/PPC.h index 3ffb680fdc0..f5507c29bef 100644 --- a/llvm/lib/Target/PowerPC/PPC.h +++ b/llvm/lib/Target/PowerPC/PPC.h @@ -28,7 +28,7 @@ FunctionPass *createPPCBranchSelectionPass(); FunctionPass *createPPCISelDag(PPCTargetMachine &TM); FunctionPass *createPPCAsmPrinterPass(raw_ostream &OS, PPCTargetMachine &TM, - bool Fast, bool Verbose); + unsigned OptLevel, bool Verbose); FunctionPass *createPPCCodeEmitterPass(PPCTargetMachine &TM, MachineCodeEmitter &MCE); } // end namespace llvm; diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp index 1d3787faa6d..3e1dc3253b2 100644 --- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp +++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp @@ -129,29 +129,31 @@ PPC64TargetMachine::PPC64TargetMachine(const Module &M, const std::string &FS) // Pass Pipeline Configuration //===----------------------------------------------------------------------===// -bool PPCTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) { +bool PPCTargetMachine::addInstSelector(PassManagerBase &PM, unsigned OptLevel) { // Install an instruction selector. PM.add(createPPCISelDag(*this)); return false; } -bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) { +bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM, unsigned OptLevel) { // Must run branch selection immediately preceding the asm printer. PM.add(createPPCBranchSelectionPass()); return false; } -bool PPCTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast, - bool Verbose, raw_ostream &Out) { +bool PPCTargetMachine::addAssemblyEmitter(PassManagerBase &PM, + unsigned OptLevel, + bool Verbose, + raw_ostream &Out) { assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(Out, *this, Fast, Verbose)); + PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); return false; } -bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast, +bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, unsigned OptLevel, bool DumpAsm, MachineCodeEmitter &MCE) { // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64. // FIXME: This should be moved to TargetJITInfo!! @@ -176,20 +178,20 @@ bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast, if (DumpAsm) { assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(errs(), *this, Fast, true)); + PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); } return false; } -bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast, +bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, unsigned OptLevel, bool DumpAsm, MachineCodeEmitter &MCE) { // Machine code emitter pass for PowerPC. PM.add(createPPCCodeEmitterPass(*this, MCE)); if (DumpAsm) { assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(errs(), *this, Fast, true)); + PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); } return false; diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.h b/llvm/lib/Target/PowerPC/PPCTargetMachine.h index d33eb797648..2f839fb07bf 100644 --- a/llvm/lib/Target/PowerPC/PPCTargetMachine.h +++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.h @@ -46,7 +46,7 @@ protected: // set this functions to ctor pointer at startup time if they are linked in. typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, PPCTargetMachine &tm, - bool fast, bool verbose); + unsigned OptLevel, bool verbose); static AsmPrinterCtorFn AsmPrinterCtor; public: @@ -76,13 +76,13 @@ public: } // Pass Pipeline Configuration - virtual bool addInstSelector(PassManagerBase &PM, bool Fast); - virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast); - virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast, + virtual bool addInstSelector(PassManagerBase &PM, unsigned OptLevel); + virtual bool addPreEmitPass(PassManagerBase &PM, unsigned OptLevel); + virtual bool addAssemblyEmitter(PassManagerBase &PM, unsigned OptLevel, bool Verbose, raw_ostream &Out); - virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast, + virtual bool addCodeEmitter(PassManagerBase &PM, unsigned OptLevel, bool DumpAsm, MachineCodeEmitter &MCE); - virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast, + virtual bool addSimpleCodeEmitter(PassManagerBase &PM, unsigned OptLevel, bool DumpAsm, MachineCodeEmitter &MCE); virtual bool getEnableTailMergeDefault() const; }; diff --git a/llvm/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp b/llvm/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp index ccb0dd9a6c6..ab1868425c5 100644 --- a/llvm/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp +++ b/llvm/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp @@ -48,9 +48,9 @@ namespace { typedef std::map<const Value *, unsigned> ValueMapTy; ValueMapTy NumberForBB; public: - SparcAsmPrinter(raw_ostream &O, TargetMachine &TM, - const TargetAsmInfo *T, bool F, bool V) - : AsmPrinter(O, TM, T, F, V) {} + explicit SparcAsmPrinter(raw_ostream &O, TargetMachine &TM, + const TargetAsmInfo *T, unsigned OL, bool V) + : AsmPrinter(O, TM, T, OL, V) {} virtual const char *getPassName() const { return "Sparc Assembly Printer"; @@ -82,8 +82,9 @@ namespace { /// FunctionPass *llvm::createSparcCodePrinterPass(raw_ostream &o, TargetMachine &tm, - bool fast, bool verbose) { - return new SparcAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose); + unsigned OptLevel, + bool verbose) { + return new SparcAsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose); } /// runOnMachineFunction - This uses the printInstruction() diff --git a/llvm/lib/Target/Sparc/Sparc.h b/llvm/lib/Target/Sparc/Sparc.h index 0a139f6a073..74b2e476149 100644 --- a/llvm/lib/Target/Sparc/Sparc.h +++ b/llvm/lib/Target/Sparc/Sparc.h @@ -25,7 +25,7 @@ namespace llvm { FunctionPass *createSparcISelDag(SparcTargetMachine &TM); FunctionPass *createSparcCodePrinterPass(raw_ostream &OS, TargetMachine &TM, - bool Fast, bool Verbose); + unsigned OptLevel, bool Verbose); FunctionPass *createSparcDelaySlotFillerPass(TargetMachine &TM); FunctionPass *createSparcFPMoverPass(TargetMachine &TM); } // end namespace llvm; diff --git a/llvm/lib/Target/Sparc/SparcTargetMachine.cpp b/llvm/lib/Target/Sparc/SparcTargetMachine.cpp index 4ebca3f6bba..cabfce118aa 100644 --- a/llvm/lib/Target/Sparc/SparcTargetMachine.cpp +++ b/llvm/lib/Target/Sparc/SparcTargetMachine.cpp @@ -68,7 +68,8 @@ unsigned SparcTargetMachine::getModuleMatchQuality(const Module &M) { #endif } -bool SparcTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) { +bool SparcTargetMachine::addInstSelector(PassManagerBase &PM, + unsigned OptLevel) { PM.add(createSparcISelDag(*this)); return false; } @@ -76,15 +77,17 @@ bool SparcTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) { /// addPreEmitPass - This pass may be implemented by targets that want to run /// passes immediately before machine code is emitted. This should return /// true if -print-machineinstrs should print out the code after the passes. -bool SparcTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) { +bool SparcTargetMachine::addPreEmitPass(PassManagerBase &PM, unsigned OptLevel){ PM.add(createSparcFPMoverPass(*this)); PM.add(createSparcDelaySlotFillerPass(*this)); return true; } -bool SparcTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast, - bool Verbose, raw_ostream &Out) { +bool SparcTargetMachine::addAssemblyEmitter(PassManagerBase &PM, + unsigned OptLevel, + bool Verbose, + raw_ostream &Out) { // Output assembly language. - PM.add(createSparcCodePrinterPass(Out, *this, Fast, Verbose)); + PM.add(createSparcCodePrinterPass(Out, *this, OptLevel, Verbose)); return false; } diff --git a/llvm/lib/Target/Sparc/SparcTargetMachine.h b/llvm/lib/Target/Sparc/SparcTargetMachine.h index e775448e45d..927cbb5fa17 100644 --- a/llvm/lib/Target/Sparc/SparcTargetMachine.h +++ b/llvm/lib/Target/Sparc/SparcTargetMachine.h @@ -51,9 +51,9 @@ public: static unsigned getModuleMatchQuality(const Module &M); // Pass Pipeline Configuration - virtual bool addInstSelector(PassManagerBase &PM, bool Fast); - virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast); - virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast, + virtual bool addInstSelector(PassManagerBase &PM, unsigned OptLevel); + virtual bool addPreEmitPass(PassManagerBase &PM, unsigned OptLevel); + virtual bool addAssemblyEmitter(PassManagerBase &PM, unsigned OptLevel, bool Verbose, raw_ostream &Out); }; diff --git a/llvm/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h b/llvm/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h index 30630e97846..7cf9c72b170 100644 --- a/llvm/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h +++ b/llvm/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h @@ -33,9 +33,9 @@ class VISIBILITY_HIDDEN X86ATTAsmPrinter : public AsmPrinter { MachineModuleInfo *MMI; const X86Subtarget *Subtarget; public: - X86ATTAsmPrinter(raw_ostream &O, X86TargetMachine &TM, - const TargetAsmInfo *T, bool F, bool V) - : AsmPrinter(O, TM, T, F, V), DW(0), MMI(0) { + explicit X86ATTAsmPrinter(raw_ostream &O, X86TargetMachine &TM, + const TargetAsmInfo *T, unsigned OL, bool V) + : AsmPrinter(O, TM, T, OL, V), DW(0), MMI(0) { Subtarget = &TM.getSubtarget<X86Subtarget>(); } diff --git a/llvm/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp b/llvm/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp index d64aaa6edb8..85c5471277e 100644 --- a/llvm/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp +++ b/llvm/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp @@ -25,13 +25,15 @@ using namespace llvm; /// FunctionPass *llvm::createX86CodePrinterPass(raw_ostream &o, X86TargetMachine &tm, - bool fast, bool verbose) { + unsigned OptLevel, bool verbose) { const X86Subtarget *Subtarget = &tm.getSubtarget<X86Subtarget>(); if (Subtarget->isFlavorIntel()) { - return new X86IntelAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose); + return new X86IntelAsmPrinter(o, tm, tm.getTargetAsmInfo(), + OptLevel, verbose); } else { - return new X86ATTAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose); + return new X86ATTAsmPrinter(o, tm, tm.getTargetAsmInfo(), + OptLevel, verbose); } } diff --git a/llvm/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h b/llvm/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h index 489d946790e..054cd9c70fc 100644 --- a/llvm/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h +++ b/llvm/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h @@ -25,9 +25,9 @@ namespace llvm { struct VISIBILITY_HIDDEN X86IntelAsmPrinter : public AsmPrinter { - X86IntelAsmPrinter(raw_ostream &O, X86TargetMachine &TM, - const TargetAsmInfo *T, bool F, bool V) - : AsmPrinter(O, TM, T, F, V) {} + explicit X86IntelAsmPrinter(raw_ostream &O, X86TargetMachine &TM, + const TargetAsmInfo *T, unsigned OL, bool V) + : AsmPrinter(O, TM, T, OL, V) {} virtual const char *getPassName() const { return "X86 Intel-Style Assembly Printer"; diff --git a/llvm/lib/Target/X86/X86.h b/llvm/lib/Target/X86/X86.h index 72ff02ba6f6..9dad017dd3e 100644 --- a/llvm/lib/Target/X86/X86.h +++ b/llvm/lib/Target/X86/X86.h @@ -25,7 +25,7 @@ class raw_ostream; /// createX86ISelDag - This pass converts a legalized DAG into a /// X86-specific DAG, ready for instruction scheduling. /// -FunctionPass *createX86ISelDag(X86TargetMachine &TM, bool Fast); +FunctionPass *createX86ISelDag(X86TargetMachine &TM, unsigned OptSize); /// createX86FloatingPointStackifierPass - This function returns a pass which /// converts floating point register references and pseudo instructions into @@ -44,7 +44,7 @@ FunctionPass *createX87FPRegKillInserterPass(); /// FunctionPass *createX86CodePrinterPass(raw_ostream &o, X86TargetMachine &tm, - bool fast, bool Verbose); + unsigned OptLevel, bool Verbose); /// createX86CodeEmitterPass - Return a pass that emits the collected X86 code /// to the specified MCE object. diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp index 4b698cec1a5..7da43e97dcc 100644 --- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -134,8 +134,8 @@ namespace { bool OptForSize; public: - X86DAGToDAGISel(X86TargetMachine &tm, bool fast) - : SelectionDAGISel(tm, fast), + explicit X86DAGToDAGISel(X86TargetMachine &tm, unsigned OptLevel) + : SelectionDAGISel(tm, OptLevel), TM(tm), X86Lowering(*TM.getTargetLowering()), Subtarget(&TM.getSubtarget<X86Subtarget>()), OptForSize(false) {} @@ -306,7 +306,7 @@ static inline bool isNonImmUse(SDNode *Root, SDNode *Def, SDNode *ImmedUse) { bool X86DAGToDAGISel::IsLegalAndProfitableToFold(SDNode *N, SDNode *U, SDNode *Root) const { - if (Fast) return false; + if (OptLevel == 0) return false; if (U == Root) switch (U->getOpcode()) { @@ -512,7 +512,7 @@ static bool isCalleeLoad(SDValue Callee, SDValue &Chain) { /// PreprocessForRMW - Preprocess the DAG to make instruction selection better. -/// This is only run if not in -fast mode (aka -O0). +/// This is only run if not in -O0 mode. /// This allows the instruction selector to pick more read-modify-write /// instructions. This is a common case: /// @@ -714,10 +714,10 @@ void X86DAGToDAGISel::InstructionSelect() { OptForSize = F->hasFnAttr(Attribute::OptimizeForSize); DEBUG(BB->dump()); - if (!Fast) + if (OptLevel != 0) PreprocessForRMW(); - // FIXME: This should only happen when not -fast. + // FIXME: This should only happen when not compiled with -O0. PreprocessForFPConvert(); // Codegen the basic block. @@ -1744,6 +1744,6 @@ SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, /// createX86ISelDag - This pass converts a legalized DAG into a /// X86-specific DAG, ready for instruction scheduling. /// -FunctionPass *llvm::createX86ISelDag(X86TargetMachine &TM, bool Fast) { - return new X86DAGToDAGISel(TM, Fast); +FunctionPass *llvm::createX86ISelDag(X86TargetMachine &TM, unsigned OptLevel) { + return new X86DAGToDAGISel(TM, OptLevel); } diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp index a20e1c44896..df086e8cea7 100644 --- a/llvm/lib/Target/X86/X86TargetMachine.cpp +++ b/llvm/lib/Target/X86/X86TargetMachine.cpp @@ -180,9 +180,9 @@ X86TargetMachine::X86TargetMachine(const Module &M, const std::string &FS, // Pass Pipeline Configuration //===----------------------------------------------------------------------===// -bool X86TargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) { +bool X86TargetMachine::addInstSelector(PassManagerBase &PM, unsigned OptLevel) { // Install an instruction selector. - PM.add(createX86ISelDag(*this, Fast)); + PM.add(createX86ISelDag(*this, OptLevel)); // If we're using Fast-ISel, clean up the mess. if (EnableFastISel) @@ -194,27 +194,29 @@ bool X86TargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) { return false; } -bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM, bool Fast) { +bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM, unsigned OptLevel) { // Calculate and set max stack object alignment early, so we can decide // whether we will need stack realignment (and thus FP). PM.add(createX86MaxStackAlignmentCalculatorPass()); return false; // -print-machineinstr shouldn't print after this. } -bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM, bool Fast) { +bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM, unsigned OptLevel) { PM.add(createX86FloatingPointStackifierPass()); return true; // -print-machineinstr should print after this. } -bool X86TargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast, - bool Verbose, raw_ostream &Out) { +bool X86TargetMachine::addAssemblyEmitter(PassManagerBase &PM, + unsigned OptLevel, + bool Verbose, + raw_ostream &Out) { assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(Out, *this, Fast, Verbose)); + PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); return false; } -bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast, +bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, unsigned OptLevel, bool DumpAsm, MachineCodeEmitter &MCE) { // FIXME: Move this to TargetJITInfo! // On Darwin, do not override 64-bit setting made in X86TargetMachine(). @@ -236,19 +238,20 @@ bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast, if (DumpAsm) { assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(errs(), *this, Fast, true)); + PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); } return false; } -bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast, - bool DumpAsm, MachineCodeEmitter &MCE) { +bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, + unsigned OptLevel, bool DumpAsm, + MachineCodeEmitter &MCE) { PM.add(createX86CodeEmitterPass(*this, MCE)); if (DumpAsm) { assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(errs(), *this, Fast, true)); + PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); } return false; diff --git a/llvm/lib/Target/X86/X86TargetMachine.h b/llvm/lib/Target/X86/X86TargetMachine.h index fdc00fa1ef9..4b4e26f6004 100644 --- a/llvm/lib/Target/X86/X86TargetMachine.h +++ b/llvm/lib/Target/X86/X86TargetMachine.h @@ -45,7 +45,7 @@ protected: // set this functions to ctor pointer at startup time if they are linked in. typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, X86TargetMachine &tm, - bool fast, bool verbose); + unsigned OptLevel, bool verbose); static AsmPrinterCtorFn AsmPrinterCtor; public: @@ -74,14 +74,14 @@ public: } // Set up the pass pipeline. - virtual bool addInstSelector(PassManagerBase &PM, bool Fast); - virtual bool addPreRegAlloc(PassManagerBase &PM, bool Fast); - virtual bool addPostRegAlloc(PassManagerBase &PM, bool Fast); - virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast, + virtual bool addInstSelector(PassManagerBase &PM, unsigned OptLevel); + virtual bool addPreRegAlloc(PassManagerBase &PM, unsigned OptLevel); + virtual bool addPostRegAlloc(PassManagerBase &PM, unsigned OptLevel); + virtual bool addAssemblyEmitter(PassManagerBase &PM, unsigned OptLevel, bool Verbose, raw_ostream &Out); - virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast, + virtual bool addCodeEmitter(PassManagerBase &PM, unsigned OptLevel, bool DumpAsm, MachineCodeEmitter &MCE); - virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast, + virtual bool addSimpleCodeEmitter(PassManagerBase &PM, unsigned OptLevel, bool DumpAsm, MachineCodeEmitter &MCE); /// symbolicAddressesAreRIPRel - Return true if symbolic addresses are diff --git a/llvm/lib/Target/XCore/XCore.h b/llvm/lib/Target/XCore/XCore.h index 62cf4032d68..1c99d887b02 100644 --- a/llvm/lib/Target/XCore/XCore.h +++ b/llvm/lib/Target/XCore/XCore.h @@ -24,7 +24,7 @@ namespace llvm { FunctionPass *createXCoreISelDag(XCoreTargetMachine &TM); FunctionPass *createXCoreCodePrinterPass(raw_ostream &OS, XCoreTargetMachine &TM, - bool Fast, bool Verbose); + unsigned OptLevel, bool Verbose); } // end namespace llvm; // Defines symbolic names for XCore registers. This defines a mapping from diff --git a/llvm/lib/Target/XCore/XCoreAsmPrinter.cpp b/llvm/lib/Target/XCore/XCoreAsmPrinter.cpp index a3907e9fe6a..accc35afbe6 100644 --- a/llvm/lib/Target/XCore/XCoreAsmPrinter.cpp +++ b/llvm/lib/Target/XCore/XCoreAsmPrinter.cpp @@ -58,8 +58,8 @@ namespace { const XCoreSubtarget &Subtarget; public: XCoreAsmPrinter(raw_ostream &O, XCoreTargetMachine &TM, - const TargetAsmInfo *T, bool F, bool V) - : AsmPrinter(O, TM, T, F, V), DW(0), + const TargetAsmInfo *T, unsigned OL, bool V) + : AsmPrinter(O, TM, T, OL, V), DW(0), Subtarget(*TM.getSubtargetImpl()) {} virtual const char *getPassName() const { @@ -105,8 +105,9 @@ namespace { /// FunctionPass *llvm::createXCoreCodePrinterPass(raw_ostream &o, XCoreTargetMachine &tm, - bool fast, bool verbose) { - return new XCoreAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose); + unsigned OptLevel, + bool verbose) { + return new XCoreAsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose); } // PrintEscapedString - Print each character of the specified string, escaping diff --git a/llvm/lib/Target/XCore/XCoreTargetMachine.cpp b/llvm/lib/Target/XCore/XCoreTargetMachine.cpp index 1bfd7af1de2..bb0ba775a21 100644 --- a/llvm/lib/Target/XCore/XCoreTargetMachine.cpp +++ b/llvm/lib/Target/XCore/XCoreTargetMachine.cpp @@ -55,14 +55,17 @@ unsigned XCoreTargetMachine::getModuleMatchQuality(const Module &M) { return 0; } -bool XCoreTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) { +bool XCoreTargetMachine::addInstSelector(PassManagerBase &PM, + unsigned OptLevel) { PM.add(createXCoreISelDag(*this)); return false; } -bool XCoreTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast, - bool Verbose, raw_ostream &Out) { +bool XCoreTargetMachine::addAssemblyEmitter(PassManagerBase &PM, + unsigned OptLevel, + bool Verbose, + raw_ostream &Out) { // Output assembly language. - PM.add(createXCoreCodePrinterPass(Out, *this, Fast, Verbose)); + PM.add(createXCoreCodePrinterPass(Out, *this, OptLevel, Verbose)); return false; } diff --git a/llvm/lib/Target/XCore/XCoreTargetMachine.h b/llvm/lib/Target/XCore/XCoreTargetMachine.h index 081bdbdaf2e..e57e672fadf 100644 --- a/llvm/lib/Target/XCore/XCoreTargetMachine.h +++ b/llvm/lib/Target/XCore/XCoreTargetMachine.h @@ -52,8 +52,8 @@ public: static unsigned getModuleMatchQuality(const Module &M); // Pass Pipeline Configuration - virtual bool addInstSelector(PassManagerBase &PM, bool Fast); - virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast, + virtual bool addInstSelector(PassManagerBase &PM, unsigned OptLevel); + virtual bool addAssemblyEmitter(PassManagerBase &PM, unsigned OptLevel, bool Verbose, raw_ostream &Out); }; |
