2 files changed, 19 insertions, 17 deletions

diff --git a/llvm/lib/Target/Sparc/SparcRegClassInfo.cpp b/llvm/lib/Target/Sparc/SparcRegClassInfo.cpp
index 11a82511587..da40826b3e0 100644
--- a/llvm/lib/Target/Sparc/SparcRegClassInfo.cpp
+++ b/llvm/lib/Target/Sparc/SparcRegClassInfo.cpp
@@ -18,7 +18,7 @@ using std::cerr;
 //     If both above fail, spill.
 //  
 //-----------------------------------------------------------------------------
-void SparcIntRegClass::colorIGNode(IGNode * Node, bool IsColorUsedArr[]) const {
+void SparcIntRegClass::colorIGNode(IGNode * Node, vector<bool> &IsColorUsedArr) const {
   LiveRange *LR = Node->getParentLR();
 
   if( DEBUG_RA ) {
@@ -30,7 +30,7 @@ void SparcIntRegClass::colorIGNode(IGNode * Node, bool IsColorUsedArr[]) const {
 
     unsigned SugCol = LR->getSuggestedColor();
 
-    if( ! IsColorUsedArr[ SugCol ] ) {
+    if (!IsColorUsedArr[SugCol]) {
 
       if( LR->isSuggestedColorUsable()  ) {
 
@@ -71,7 +71,7 @@ void SparcIntRegClass::colorIGNode(IGNode * Node, bool IsColorUsedArr[]) const {
  
   // find first unused color
   for( c=SearchStart; c < SparcIntRegOrder::NumOfAvailRegs; c++) { 
-    if( ! IsColorUsedArr[ c ] ) { ColorFound = true; break; }
+    if(!IsColorUsedArr[c] ) { ColorFound = true; break; }
   }
 
   if( ColorFound) {
@@ -130,7 +130,8 @@ void SparcIntRegClass::colorIGNode(IGNode * Node, bool IsColorUsedArr[]) const {
 //     If a color is still not fond, mark for spilling
 //
 //----------------------------------------------------------------------------
-void SparcFloatRegClass::colorIGNode(IGNode * Node,bool IsColorUsedArr[]) const{
+void SparcFloatRegClass::colorIGNode(IGNode * Node,
+                                     vector<bool> &IsColorUsedArr) const{
   LiveRange *LR = Node->getParentLR();
 
   // Mark the second color for double-precision registers:
@@ -175,7 +176,7 @@ void SparcFloatRegClass::colorIGNode(IGNode * Node,bool IsColorUsedArr[]) const{
   int ColorFound = -1;               // have we found a color yet?
   bool isCallInterf = LR->isCallInterference();
 
-  // if value is a double - search the double only reigon (f32 - f63)
+  // if value is a double - search the double only region (f32 - f63)
   // i.e. we try to allocate f32 - f63 first for doubles since singles
   // cannot go there. By doing that, we provide more space for singles
   // in f0 - f31
@@ -243,7 +244,7 @@ void SparcFloatRegClass::colorIGNode(IGNode * Node,bool IsColorUsedArr[]) const{
 
 int SparcFloatRegClass::findFloatColor(const LiveRange *LR, 
 				       unsigned Start, unsigned End, 
-				       bool IsColorUsedArr[]) const {
+				       vector<bool> &IsColorUsedArr) const {
   bool ColorFound = false;
   unsigned c;
 
diff --git a/llvm/lib/Target/Sparc/SparcRegClassInfo.h b/llvm/lib/Target/Sparc/SparcRegClassInfo.h
index ab5b35c8010..f07d0aa5f2b 100644
--- a/llvm/lib/Target/Sparc/SparcRegClassInfo.h
+++ b/llvm/lib/Target/Sparc/SparcRegClassInfo.h
@@ -82,7 +82,7 @@ struct SparcIntRegClass : public MachineRegClassInfo {
 			  SparcIntRegOrder::NumOfAvailRegs,
 			  SparcIntRegOrder::NumOfAllRegs) {  }
 
-  void colorIGNode(IGNode *Node, bool IsColorUsedArr[]) const;
+  void colorIGNode(IGNode *Node, std::vector<bool> &IsColorUsedArr) const;
 
   inline bool isRegVolatile(int Reg) const {
     return (Reg < (int) SparcIntRegOrder::StartOfNonVolatileRegs); 
@@ -144,14 +144,14 @@ class SparcFloatRegOrder{
 
 class SparcFloatRegClass : public MachineRegClassInfo {
   int findFloatColor(const LiveRange *LR, unsigned Start,
-		     unsigned End, bool IsColorUsedArr[]) const;
+		     unsigned End, std::vector<bool> &IsColorUsedArr) const;
 public:
   SparcFloatRegClass(unsigned ID) 
     : MachineRegClassInfo(ID, 
 			  SparcFloatRegOrder::NumOfAvailRegs,
 			  SparcFloatRegOrder::NumOfAllRegs) {}
 
-  void colorIGNode(IGNode *Node, bool IsColorUsedArr[]) const;
+  void colorIGNode(IGNode *Node, std::vector<bool> &IsColorUsedArr) const;
 
   // according to  Sparc 64 ABI, all %fp regs are volatile
   inline bool isRegVolatile(int Reg) const { return true; }
@@ -192,7 +192,7 @@ struct SparcIntCCRegClass : public MachineRegClassInfo {
   SparcIntCCRegClass(unsigned ID) 
     : MachineRegClassInfo(ID, 1, 2) {  }
   
-  inline void colorIGNode(IGNode *Node, bool IsColorUsedArr[]) const {
+  void colorIGNode(IGNode *Node, std::vector<bool> &IsColorUsedArr) const {
     if (IsColorUsedArr[0])
       Node->getParentLR()->markForSpill();
     else
@@ -231,13 +231,14 @@ struct SparcFloatCCRegClass : public MachineRegClassInfo {
   SparcFloatCCRegClass(unsigned ID) 
     : MachineRegClassInfo(ID, 4, 4) {  }
 
-  void colorIGNode(IGNode *Node, bool IsColorUsedArr[]) const {
-    int c;
-    for(c=0; c < 4  && IsColorUsedArr[c] ; ++c) ; // find unused color
-    if (c < 4)
-      Node->setColor(c);   
-    else
-      Node->getParentLR()->markForSpill();
+  void colorIGNode(IGNode *Node, std::vector<bool> &IsColorUsedArr) const {
+    for(unsigned c = 0; c != 4; ++c)
+      if (!IsColorUsedArr[c]) { // find unused color
+        Node->setColor(c);   
+        return;
+      }
+
+    Node->getParentLR()->markForSpill();
   }
   
   // according to  Sparc 64 ABI, all %fp CC regs are volatile