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-rw-r--r--llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp167
-rw-r--r--llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTInfo.h131
-rw-r--r--llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTUtils.cpp29
3 files changed, 85 insertions, 242 deletions
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
index 83dcaacb738..3f668f3cf12 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
@@ -14,6 +14,7 @@
#include "AMDGPUTargetStreamer.h"
#include "SIDefines.h"
#include "Utils/AMDGPUBaseInfo.h"
+#include "Utils/AMDKernelCodeTUtils.h"
#include "llvm/ADT/Twine.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCELFStreamer.h"
@@ -56,169 +57,9 @@ AMDGPUTargetAsmStreamer::EmitDirectiveHSACodeObjectISA(uint32_t Major,
void
AMDGPUTargetAsmStreamer::EmitAMDKernelCodeT(const amd_kernel_code_t &Header) {
- uint64_t ComputePgmRsrc2 = (Header.compute_pgm_resource_registers >> 32);
- bool EnableSGPRPrivateSegmentBuffer = (Header.code_properties &
- AMD_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER);
- bool EnableSGPRDispatchPtr = (Header.code_properties &
- AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR);
- bool EnableSGPRQueuePtr = (Header.code_properties &
- AMD_CODE_PROPERTY_ENABLE_SGPR_QUEUE_PTR);
- bool EnableSGPRKernargSegmentPtr = (Header.code_properties &
- AMD_CODE_PROPERTY_ENABLE_SGPR_KERNARG_SEGMENT_PTR);
- bool EnableSGPRDispatchID = (Header.code_properties &
- AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_ID);
- bool EnableSGPRFlatScratchInit = (Header.code_properties &
- AMD_CODE_PROPERTY_ENABLE_SGPR_FLAT_SCRATCH_INIT);
- bool EnableSGPRPrivateSegmentSize = (Header.code_properties &
- AMD_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_SIZE);
- bool EnableSGPRGridWorkgroupCountX = (Header.code_properties &
- AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_X);
- bool EnableSGPRGridWorkgroupCountY = (Header.code_properties &
- AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_Y);
- bool EnableSGPRGridWorkgroupCountZ = (Header.code_properties &
- AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_Z);
- bool EnableOrderedAppendGDS = (Header.code_properties &
- AMD_CODE_PROPERTY_ENABLE_ORDERED_APPEND_GDS);
- uint32_t PrivateElementSize = (Header.code_properties &
- AMD_CODE_PROPERTY_PRIVATE_ELEMENT_SIZE) >>
- AMD_CODE_PROPERTY_PRIVATE_ELEMENT_SIZE_SHIFT;
- bool IsPtr64 = (Header.code_properties & AMD_CODE_PROPERTY_IS_PTR64);
- bool IsDynamicCallstack = (Header.code_properties &
- AMD_CODE_PROPERTY_IS_DYNAMIC_CALLSTACK);
- bool IsDebugEnabled = (Header.code_properties &
- AMD_CODE_PROPERTY_IS_DEBUG_SUPPORTED);
- bool IsXNackEnabled = (Header.code_properties &
- AMD_CODE_PROPERTY_IS_XNACK_SUPPORTED);
-
- OS << "\t.amd_kernel_code_t\n" <<
- "\t\tkernel_code_version_major = " <<
- Header.amd_kernel_code_version_major << '\n' <<
- "\t\tkernel_code_version_minor = " <<
- Header.amd_kernel_code_version_minor << '\n' <<
- "\t\tmachine_kind = " <<
- Header.amd_machine_kind << '\n' <<
- "\t\tmachine_version_major = " <<
- Header.amd_machine_version_major << '\n' <<
- "\t\tmachine_version_minor = " <<
- Header.amd_machine_version_minor << '\n' <<
- "\t\tmachine_version_stepping = " <<
- Header.amd_machine_version_stepping << '\n' <<
- "\t\tkernel_code_entry_byte_offset = " <<
- Header.kernel_code_entry_byte_offset << '\n' <<
- "\t\tkernel_code_prefetch_byte_size = " <<
- Header.kernel_code_prefetch_byte_size << '\n' <<
- "\t\tmax_scratch_backing_memory_byte_size = " <<
- Header.max_scratch_backing_memory_byte_size << '\n' <<
- "\t\tcompute_pgm_rsrc1_vgprs = " <<
- G_00B848_VGPRS(Header.compute_pgm_resource_registers) << '\n' <<
- "\t\tcompute_pgm_rsrc1_sgprs = " <<
- G_00B848_SGPRS(Header.compute_pgm_resource_registers) << '\n' <<
- "\t\tcompute_pgm_rsrc1_priority = " <<
- G_00B848_PRIORITY(Header.compute_pgm_resource_registers) << '\n' <<
- "\t\tcompute_pgm_rsrc1_float_mode = " <<
- G_00B848_FLOAT_MODE(Header.compute_pgm_resource_registers) << '\n' <<
- "\t\tcompute_pgm_rsrc1_priv = " <<
- G_00B848_PRIV(Header.compute_pgm_resource_registers) << '\n' <<
- "\t\tcompute_pgm_rsrc1_dx10_clamp = " <<
- G_00B848_DX10_CLAMP(Header.compute_pgm_resource_registers) << '\n' <<
- "\t\tcompute_pgm_rsrc1_debug_mode = " <<
- G_00B848_DEBUG_MODE(Header.compute_pgm_resource_registers) << '\n' <<
- "\t\tcompute_pgm_rsrc1_ieee_mode = " <<
- G_00B848_IEEE_MODE(Header.compute_pgm_resource_registers) << '\n' <<
- "\t\tcompute_pgm_rsrc2_scratch_en = " <<
- G_00B84C_SCRATCH_EN(ComputePgmRsrc2) << '\n' <<
- "\t\tcompute_pgm_rsrc2_user_sgpr = " <<
- G_00B84C_USER_SGPR(ComputePgmRsrc2) << '\n' <<
- "\t\tcompute_pgm_rsrc2_tgid_x_en = " <<
- G_00B84C_TGID_X_EN(ComputePgmRsrc2) << '\n' <<
- "\t\tcompute_pgm_rsrc2_tgid_y_en = " <<
- G_00B84C_TGID_Y_EN(ComputePgmRsrc2) << '\n' <<
- "\t\tcompute_pgm_rsrc2_tgid_z_en = " <<
- G_00B84C_TGID_Z_EN(ComputePgmRsrc2) << '\n' <<
- "\t\tcompute_pgm_rsrc2_tg_size_en = " <<
- G_00B84C_TG_SIZE_EN(ComputePgmRsrc2) << '\n' <<
- "\t\tcompute_pgm_rsrc2_tidig_comp_cnt = " <<
- G_00B84C_TIDIG_COMP_CNT(ComputePgmRsrc2) << '\n' <<
- "\t\tcompute_pgm_rsrc2_excp_en_msb = " <<
- G_00B84C_EXCP_EN_MSB(ComputePgmRsrc2) << '\n' <<
- "\t\tcompute_pgm_rsrc2_lds_size = " <<
- G_00B84C_LDS_SIZE(ComputePgmRsrc2) << '\n' <<
- "\t\tcompute_pgm_rsrc2_excp_en = " <<
- G_00B84C_EXCP_EN(ComputePgmRsrc2) << '\n' <<
-
- "\t\tenable_sgpr_private_segment_buffer = " <<
- EnableSGPRPrivateSegmentBuffer << '\n' <<
- "\t\tenable_sgpr_dispatch_ptr = " <<
- EnableSGPRDispatchPtr << '\n' <<
- "\t\tenable_sgpr_queue_ptr = " <<
- EnableSGPRQueuePtr << '\n' <<
- "\t\tenable_sgpr_kernarg_segment_ptr = " <<
- EnableSGPRKernargSegmentPtr << '\n' <<
- "\t\tenable_sgpr_dispatch_id = " <<
- EnableSGPRDispatchID << '\n' <<
- "\t\tenable_sgpr_flat_scratch_init = " <<
- EnableSGPRFlatScratchInit << '\n' <<
- "\t\tenable_sgpr_private_segment_size = " <<
- EnableSGPRPrivateSegmentSize << '\n' <<
- "\t\tenable_sgpr_grid_workgroup_count_x = " <<
- EnableSGPRGridWorkgroupCountX << '\n' <<
- "\t\tenable_sgpr_grid_workgroup_count_y = " <<
- EnableSGPRGridWorkgroupCountY << '\n' <<
- "\t\tenable_sgpr_grid_workgroup_count_z = " <<
- EnableSGPRGridWorkgroupCountZ << '\n' <<
- "\t\tenable_ordered_append_gds = " <<
- EnableOrderedAppendGDS << '\n' <<
- "\t\tprivate_element_size = " <<
- PrivateElementSize << '\n' <<
- "\t\tis_ptr64 = " <<
- IsPtr64 << '\n' <<
- "\t\tis_dynamic_callstack = " <<
- IsDynamicCallstack << '\n' <<
- "\t\tis_debug_enabled = " <<
- IsDebugEnabled << '\n' <<
- "\t\tis_xnack_enabled = " <<
- IsXNackEnabled << '\n' <<
- "\t\tworkitem_private_segment_byte_size = " <<
- Header.workitem_private_segment_byte_size << '\n' <<
- "\t\tworkgroup_group_segment_byte_size = " <<
- Header.workgroup_group_segment_byte_size << '\n' <<
- "\t\tgds_segment_byte_size = " <<
- Header.gds_segment_byte_size << '\n' <<
- "\t\tkernarg_segment_byte_size = " <<
- Header.kernarg_segment_byte_size << '\n' <<
- "\t\tworkgroup_fbarrier_count = " <<
- Header.workgroup_fbarrier_count << '\n' <<
- "\t\twavefront_sgpr_count = " <<
- Header.wavefront_sgpr_count << '\n' <<
- "\t\tworkitem_vgpr_count = " <<
- Header.workitem_vgpr_count << '\n' <<
- "\t\treserved_vgpr_first = " <<
- Header.reserved_vgpr_first << '\n' <<
- "\t\treserved_vgpr_count = " <<
- Header.reserved_vgpr_count << '\n' <<
- "\t\treserved_sgpr_first = " <<
- Header.reserved_sgpr_first << '\n' <<
- "\t\treserved_sgpr_count = " <<
- Header.reserved_sgpr_count << '\n' <<
- "\t\tdebug_wavefront_private_segment_offset_sgpr = " <<
- Header.debug_wavefront_private_segment_offset_sgpr << '\n' <<
- "\t\tdebug_private_segment_buffer_sgpr = " <<
- Header.debug_private_segment_buffer_sgpr << '\n' <<
- "\t\tkernarg_segment_alignment = " <<
- (uint32_t)Header.kernarg_segment_alignment << '\n' <<
- "\t\tgroup_segment_alignment = " <<
- (uint32_t)Header.group_segment_alignment << '\n' <<
- "\t\tprivate_segment_alignment = " <<
- (uint32_t)Header.private_segment_alignment << '\n' <<
- "\t\twavefront_size = " <<
- (uint32_t)Header.wavefront_size << '\n' <<
- "\t\tcall_convention = " <<
- Header.call_convention << '\n' <<
- "\t\truntime_loader_kernel_symbol = " <<
- Header.runtime_loader_kernel_symbol << '\n' <<
- // TODO: control_directives
- "\t.end_amd_kernel_code_t\n";
-
+ OS << "\t.amd_kernel_code_t\n";
+ dumpAmdKernelCode(&Header, OS, "\t\t");
+ OS << "\t.end_amd_kernel_code_t\n";
}
void AMDGPUTargetAsmStreamer::EmitAMDGPUSymbolType(StringRef SymbolName,
diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTInfo.h b/llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTInfo.h
index 3a5ff60601d..c55eaab077d 100644
--- a/llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTInfo.h
+++ b/llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTInfo.h
@@ -16,10 +16,10 @@
#define QNAME(name) amd_kernel_code_t::name
#define FLD_T(name) decltype(QNAME(name)), &QNAME(name)
-#define FIELD2(sname, name) \
- RECORD(sname, printField<FLD_T(name)>, parseField<FLD_T(name)>)
+#define FIELD2(sname, aname, name) \
+ RECORD(sname, aname, printField<FLD_T(name)>, parseField<FLD_T(name)>)
-#define FIELD(name) FIELD2(name, name)
+#define FIELD(name) FIELD2(name, name, name)
#define PRINTCODEPROP(name) \
@@ -33,7 +33,7 @@
AMD_CODE_PROPERTY_##name##_WIDTH>
#define CODEPROP(name, shift) \
- RECORD(name, PRINTCODEPROP(shift), PARSECODEPROP(shift))
+ RECORD(name, name, PRINTCODEPROP(shift), PARSECODEPROP(shift))
// have to define these lambdas because of Set/GetMacro
#define PRINTCOMP(GetMacro, Shift) \
@@ -50,32 +50,70 @@
return true; \
}
-#define COMPPGM(name, GetMacro, SetMacro, Shift) \
- RECORD(name, PRINTCOMP(GetMacro, Shift), PARSECOMP(SetMacro, Shift))
+#define COMPPGM(name, aname, GetMacro, SetMacro, Shift) \
+ RECORD(name, aname, PRINTCOMP(GetMacro, Shift), PARSECOMP(SetMacro, Shift))
-#define COMPPGM1(name, AccMacro) \
- COMPPGM(compute_pgm_rsrc1_##name, \
- G_00B848_##AccMacro, S_00B848_##AccMacro, 0)
+#define COMPPGM1(name, aname, AccMacro) \
+ COMPPGM(name, aname, G_00B848_##AccMacro, S_00B848_##AccMacro, 0)
-#define COMPPGM2(name, AccMacro) \
- COMPPGM(compute_pgm_rsrc2_##name, \
- G_00B84C_##AccMacro, S_00B84C_##AccMacro, 32)
+#define COMPPGM2(name, aname, AccMacro) \
+ COMPPGM(name, aname, G_00B84C_##AccMacro, S_00B84C_##AccMacro, 32)
///////////////////////////////////////////////////////////////////////////////
// Begin of the table
// Define RECORD(name, print, parse) in your code to get field definitions
// and include this file
-FIELD2(kernel_code_version_major, amd_kernel_code_version_major),
-FIELD2(kernel_code_version_minor, amd_kernel_code_version_minor),
-FIELD2(machine_kind, amd_machine_kind),
-FIELD2(machine_version_major, amd_machine_version_major),
-FIELD2(machine_version_minor, amd_machine_version_minor),
-FIELD2(machine_version_stepping, amd_machine_version_stepping),
+FIELD2(amd_code_version_major, kernel_code_version_major, amd_kernel_code_version_major),
+FIELD2(amd_code_version_minor, kernel_code_version_minor, amd_kernel_code_version_minor),
+FIELD2(amd_machine_kind, machine_kind, amd_machine_kind),
+FIELD2(amd_machine_version_major, machine_version_major, amd_machine_version_major),
+FIELD2(amd_machine_version_minor, machine_version_minor, amd_machine_version_minor),
+FIELD2(amd_machine_version_stepping, machine_version_stepping, amd_machine_version_stepping),
+
FIELD(kernel_code_entry_byte_offset),
FIELD(kernel_code_prefetch_byte_size),
FIELD(max_scratch_backing_memory_byte_size),
-FIELD(compute_pgm_resource_registers),
+
+COMPPGM1(granulated_workitem_vgpr_count, compute_pgm_rsrc1_vgprs, VGPRS),
+COMPPGM1(granulated_wavefront_sgpr_count, compute_pgm_rsrc1_sgprs, SGPRS),
+COMPPGM1(priority, compute_pgm_rsrc1_priority, PRIORITY),
+COMPPGM1(float_mode, compute_pgm_rsrc1_float_mode, FLOAT_MODE), // TODO: split float_mode
+COMPPGM1(priv, compute_pgm_rsrc1_priv, PRIV),
+COMPPGM1(enable_dx10_clamp, compute_pgm_rsrc1_dx10_clamp, DX10_CLAMP),
+COMPPGM1(debug_mode, compute_pgm_rsrc1_debug_mode, DEBUG_MODE),
+COMPPGM1(enable_ieee_mode, compute_pgm_rsrc1_ieee_mode, IEEE_MODE),
+// TODO: bulky
+// TODO: cdbg_user
+COMPPGM2(enable_sgpr_private_segment_wave_byte_offset, compute_pgm_rsrc2_scratch_en, SCRATCH_EN),
+COMPPGM2(user_sgpr_count, compute_pgm_rsrc2_user_sgpr, USER_SGPR),
+// TODO: enable_trap_handler
+COMPPGM2(enable_sgpr_workgroup_id_x, compute_pgm_rsrc2_tgid_x_en, TGID_X_EN),
+COMPPGM2(enable_sgpr_workgroup_id_y, compute_pgm_rsrc2_tgid_y_en, TGID_Y_EN),
+COMPPGM2(enable_sgpr_workgroup_id_z, compute_pgm_rsrc2_tgid_z_en, TGID_Z_EN),
+COMPPGM2(enable_sgpr_workgroup_info, compute_pgm_rsrc2_tg_size_en, TG_SIZE_EN),
+COMPPGM2(enable_vgpr_workitem_id, compute_pgm_rsrc2_tidig_comp_cnt, TIDIG_COMP_CNT),
+COMPPGM2(enable_exception_msb, compute_pgm_rsrc2_excp_en_msb, EXCP_EN_MSB), // TODO: split enable_exception_msb
+COMPPGM2(granulated_lds_size, compute_pgm_rsrc2_lds_size, LDS_SIZE),
+COMPPGM2(enable_exception, compute_pgm_rsrc2_excp_en, EXCP_EN), // TODO: split enable_exception
+
+CODEPROP(enable_sgpr_private_segment_buffer, ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER),
+CODEPROP(enable_sgpr_dispatch_ptr, ENABLE_SGPR_DISPATCH_PTR),
+CODEPROP(enable_sgpr_queue_ptr, ENABLE_SGPR_QUEUE_PTR),
+CODEPROP(enable_sgpr_kernarg_segment_ptr, ENABLE_SGPR_KERNARG_SEGMENT_PTR),
+CODEPROP(enable_sgpr_dispatch_id, ENABLE_SGPR_DISPATCH_ID),
+CODEPROP(enable_sgpr_flat_scratch_init, ENABLE_SGPR_FLAT_SCRATCH_INIT),
+CODEPROP(enable_sgpr_private_segment_size, ENABLE_SGPR_PRIVATE_SEGMENT_SIZE),
+CODEPROP(enable_sgpr_grid_workgroup_count_x, ENABLE_SGPR_GRID_WORKGROUP_COUNT_X),
+CODEPROP(enable_sgpr_grid_workgroup_count_y, ENABLE_SGPR_GRID_WORKGROUP_COUNT_Y),
+CODEPROP(enable_sgpr_grid_workgroup_count_z, ENABLE_SGPR_GRID_WORKGROUP_COUNT_Z),
+CODEPROP(enable_ordered_append_gds, ENABLE_ORDERED_APPEND_GDS),
+CODEPROP(private_element_size, PRIVATE_ELEMENT_SIZE),
+CODEPROP(is_ptr64, IS_PTR64),
+CODEPROP(is_dynamic_callstack, IS_DYNAMIC_CALLSTACK),
+CODEPROP(is_debug_enabled, IS_DEBUG_SUPPORTED),
+CODEPROP(is_xnack_enabled, IS_XNACK_SUPPORTED),
+
FIELD(workitem_private_segment_byte_size),
FIELD(workgroup_group_segment_byte_size),
FIELD(gds_segment_byte_size),
@@ -94,59 +132,8 @@ FIELD(group_segment_alignment),
FIELD(private_segment_alignment),
FIELD(wavefront_size),
FIELD(call_convention),
-FIELD(runtime_loader_kernel_symbol),
-
-COMPPGM1(vgprs, VGPRS),
-COMPPGM1(sgprs, SGPRS),
-COMPPGM1(priority, PRIORITY),
-COMPPGM1(float_mode, FLOAT_MODE),
-COMPPGM1(priv, PRIV),
-COMPPGM1(dx10_clamp, DX10_CLAMP),
-COMPPGM1(debug_mode, DEBUG_MODE),
-COMPPGM1(ieee_mode, IEEE_MODE),
-COMPPGM2(scratch_en, SCRATCH_EN),
-COMPPGM2(user_sgpr, USER_SGPR),
-COMPPGM2(tgid_x_en, TGID_X_EN),
-COMPPGM2(tgid_y_en, TGID_Y_EN),
-COMPPGM2(tgid_z_en, TGID_Z_EN),
-COMPPGM2(tg_size_en, TG_SIZE_EN),
-COMPPGM2(tidig_comp_cnt, TIDIG_COMP_CNT),
-COMPPGM2(excp_en_msb, EXCP_EN_MSB),
-COMPPGM2(lds_size, LDS_SIZE),
-COMPPGM2(excp_en, EXCP_EN),
-
-CODEPROP(enable_sgpr_private_segment_buffer,
- ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER),
-CODEPROP(enable_sgpr_dispatch_ptr,
- ENABLE_SGPR_DISPATCH_PTR),
-CODEPROP(enable_sgpr_queue_ptr,
- ENABLE_SGPR_QUEUE_PTR),
-CODEPROP(enable_sgpr_kernarg_segment_ptr,
- ENABLE_SGPR_KERNARG_SEGMENT_PTR),
-CODEPROP(enable_sgpr_dispatch_id,
- ENABLE_SGPR_DISPATCH_ID),
-CODEPROP(enable_sgpr_flat_scratch_init,
- ENABLE_SGPR_FLAT_SCRATCH_INIT),
-CODEPROP(enable_sgpr_private_segment_size,
- ENABLE_SGPR_PRIVATE_SEGMENT_SIZE),
-CODEPROP(enable_sgpr_grid_workgroup_count_x,
- ENABLE_SGPR_GRID_WORKGROUP_COUNT_X),
-CODEPROP(enable_sgpr_grid_workgroup_count_y,
- ENABLE_SGPR_GRID_WORKGROUP_COUNT_Y),
-CODEPROP(enable_sgpr_grid_workgroup_count_z,
- ENABLE_SGPR_GRID_WORKGROUP_COUNT_Z),
-CODEPROP(enable_ordered_append_gds,
- ENABLE_ORDERED_APPEND_GDS),
-CODEPROP(private_element_size,
- PRIVATE_ELEMENT_SIZE),
-CODEPROP(is_ptr64,
- IS_PTR64),
-CODEPROP(is_dynamic_callstack,
- IS_DYNAMIC_CALLSTACK),
-CODEPROP(is_debug_enabled,
- IS_DEBUG_SUPPORTED),
-CODEPROP(is_xnack_enabled,
- IS_XNACK_SUPPORTED)
+FIELD(runtime_loader_kernel_symbol)
+// TODO: control_directive
// end of the table
///////////////////////////////////////////////////////////////////////////////
diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTUtils.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTUtils.cpp
index f64973afa44..0333b0a14d2 100644
--- a/llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTUtils.cpp
+++ b/llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTUtils.cpp
@@ -24,22 +24,37 @@ using namespace llvm;
static ArrayRef<StringRef> get_amd_kernel_code_t_FldNames() {
static StringRef const Table[] = {
"", // not found placeholder
-#define RECORD(name, print, parse) #name
+#define RECORD(name, altName, print, parse) #name
#include "AMDKernelCodeTInfo.h"
#undef RECORD
};
return makeArrayRef(Table);
}
-static StringMap<int> createIndexMap(const ArrayRef<StringRef> &a) {
+static ArrayRef<StringRef> get_amd_kernel_code_t_FldAltNames() {
+ static StringRef const Table[] = {
+ "", // not found placeholder
+#define RECORD(name, altName, print, parse) #altName
+#include "AMDKernelCodeTInfo.h"
+#undef RECORD
+ };
+ return makeArrayRef(Table);
+}
+
+static StringMap<int> createIndexMap(const ArrayRef<StringRef> &names,
+ const ArrayRef<StringRef> &altNames) {
StringMap<int> map;
- for (auto Name : a)
- map.insert(std::make_pair(Name, map.size()));
+ assert(names.size() == altNames.size());
+ for (unsigned i = 0; i < names.size(); ++i) {
+ map.insert(std::make_pair(names[i], i));
+ map.insert(std::make_pair(altNames[i], i));
+ }
return map;
}
static int get_amd_kernel_code_t_FieldIndex(StringRef name) {
- static const auto map = createIndexMap(get_amd_kernel_code_t_FldNames());
+ static const auto map = createIndexMap(get_amd_kernel_code_t_FldNames(),
+ get_amd_kernel_code_t_FldAltNames());
return map.lookup(name) - 1; // returns -1 if not found
}
@@ -73,7 +88,7 @@ typedef void(*PrintFx)(StringRef,
static ArrayRef<PrintFx> getPrinterTable() {
static const PrintFx Table[] = {
-#define RECORD(name, print, parse) print
+#define RECORD(name, altName, print, parse) print
#include "AMDKernelCodeTInfo.h"
#undef RECORD
};
@@ -145,7 +160,7 @@ typedef bool(*ParseFx)(amd_kernel_code_t &,
static ArrayRef<ParseFx> getParserTable() {
static const ParseFx Table[] = {
-#define RECORD(name, print, parse) parse
+#define RECORD(name, altName, print, parse) parse
#include "AMDKernelCodeTInfo.h"
#undef RECORD
};
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