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-rw-r--r--llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp4
-rw-r--r--llvm/lib/Target/Blackfin/BlackfinRegisterInfo.cpp6
-rw-r--r--llvm/lib/Target/CellSPU/SPURegisterInfo.cpp4
-rw-r--r--llvm/lib/Target/MBlaze/AsmPrinter/MBlazeAsmPrinter.cpp2
-rw-r--r--llvm/lib/Target/MBlaze/MBlazeRegisterInfo.cpp12
-rw-r--r--llvm/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp2
-rw-r--r--llvm/lib/Target/Mips/MipsRegisterInfo.cpp10
-rw-r--r--llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp2
-rw-r--r--llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp10
-rw-r--r--llvm/lib/Target/TargetMachine.cpp2
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp2
-rw-r--r--llvm/lib/Target/X86/X86RegisterInfo.cpp2
12 files changed, 29 insertions, 29 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
index 1f7d8420cbd..9b7dc309c52 100644
--- a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
@@ -543,7 +543,7 @@ ARMBaseRegisterInfo::UpdateRegAllocHint(unsigned Reg, unsigned NewReg,
///
bool ARMBaseRegisterInfo::hasFP(const MachineFunction &MF) const {
const MachineFrameInfo *MFI = MF.getFrameInfo();
- return ((DisableFramePointerElim(MF) && MFI->hasCalls())||
+ return ((DisableFramePointerElim(MF) && MFI->adjustsStack())||
needsStackRealignment(MF) ||
MFI->hasVarSizedObjects() ||
MFI->isFrameAddressTaken());
@@ -571,7 +571,7 @@ needsStackRealignment(const MachineFunction &MF) const {
bool ARMBaseRegisterInfo::
cannotEliminateFrame(const MachineFunction &MF) const {
const MachineFrameInfo *MFI = MF.getFrameInfo();
- if (DisableFramePointerElim(MF) && MFI->hasCalls())
+ if (DisableFramePointerElim(MF) && MFI->adjustsStack())
return true;
return MFI->hasVarSizedObjects() || MFI->isFrameAddressTaken()
|| needsStackRealignment(MF);
diff --git a/llvm/lib/Target/Blackfin/BlackfinRegisterInfo.cpp b/llvm/lib/Target/Blackfin/BlackfinRegisterInfo.cpp
index 2512c9b7fb1..0571eb30052 100644
--- a/llvm/lib/Target/Blackfin/BlackfinRegisterInfo.cpp
+++ b/llvm/lib/Target/Blackfin/BlackfinRegisterInfo.cpp
@@ -111,7 +111,7 @@ BlackfinRegisterInfo::getPhysicalRegisterRegClass(unsigned reg, EVT VT) const {
bool BlackfinRegisterInfo::hasFP(const MachineFunction &MF) const {
const MachineFrameInfo *MFI = MF.getFrameInfo();
return DisableFramePointerElim(MF) ||
- MFI->hasCalls() || MFI->hasVarSizedObjects();
+ MFI->adjustsStack() || MFI->hasVarSizedObjects();
}
bool BlackfinRegisterInfo::
@@ -394,7 +394,7 @@ void BlackfinRegisterInfo::emitPrologue(MachineFunction &MF) const {
}
if (!hasFP(MF)) {
- assert(!MFI->hasCalls() &&
+ assert(!MFI->adjustsStack() &&
"FP elimination on a non-leaf function is not supported");
adjustRegister(MBB, MBBI, dl, BF::SP, BF::P1, -FrameSize);
return;
@@ -435,7 +435,7 @@ void BlackfinRegisterInfo::emitEpilogue(MachineFunction &MF,
assert(FrameSize%4 == 0 && "Misaligned frame size");
if (!hasFP(MF)) {
- assert(!MFI->hasCalls() &&
+ assert(!MFI->adjustsStack() &&
"FP elimination on a non-leaf function is not supported");
adjustRegister(MBB, MBBI, dl, BF::SP, BF::P1, FrameSize);
return;
diff --git a/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp b/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
index fdbe10f84a7..d8937ec5745 100644
--- a/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
+++ b/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
@@ -469,7 +469,7 @@ void SPURegisterInfo::emitPrologue(MachineFunction &MF) const
&& "SPURegisterInfo::emitPrologue: FrameSize not aligned");
// the "empty" frame size is 16 - just the register scavenger spill slot
- if (FrameSize > 16 || MFI->hasCalls()) {
+ if (FrameSize > 16 || MFI->adjustsStack()) {
FrameSize = -(FrameSize + SPUFrameInfo::minStackSize());
if (hasDebugInfo) {
// Mark effective beginning of when frame pointer becomes valid.
@@ -569,7 +569,7 @@ SPURegisterInfo::emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const
&& "SPURegisterInfo::emitEpilogue: FrameSize not aligned");
// the "empty" frame size is 16 - just the register scavenger spill slot
- if (FrameSize > 16 || MFI->hasCalls()) {
+ if (FrameSize > 16 || MFI->adjustsStack()) {
FrameSize = FrameSize + SPUFrameInfo::minStackSize();
if (isInt<10>(FrameSize + LinkSlotOffset)) {
// Reload $lr, adjust $sp by required amount
diff --git a/llvm/lib/Target/MBlaze/AsmPrinter/MBlazeAsmPrinter.cpp b/llvm/lib/Target/MBlaze/AsmPrinter/MBlazeAsmPrinter.cpp
index 04dfb0ae6f9..e42e9b3505d 100644
--- a/llvm/lib/Target/MBlaze/AsmPrinter/MBlazeAsmPrinter.cpp
+++ b/llvm/lib/Target/MBlaze/AsmPrinter/MBlazeAsmPrinter.cpp
@@ -155,7 +155,7 @@ void MBlazeAsmPrinter::printSavedRegsBitmask(raw_ostream &O) {
CPUBitmask |= (1 << MBlazeRegisterInfo::
getRegisterNumbering(RI.getFrameRegister(*MF)));
- if (MFI->hasCalls())
+ if (MFI->adjustsStack())
CPUBitmask |= (1 << MBlazeRegisterInfo::
getRegisterNumbering(RI.getRARegister()));
diff --git a/llvm/lib/Target/MBlaze/MBlazeRegisterInfo.cpp b/llvm/lib/Target/MBlaze/MBlazeRegisterInfo.cpp
index e15176eb06b..f15eea9507d 100644
--- a/llvm/lib/Target/MBlaze/MBlazeRegisterInfo.cpp
+++ b/llvm/lib/Target/MBlaze/MBlazeRegisterInfo.cpp
@@ -220,7 +220,7 @@ void MBlazeRegisterInfo::adjustMBlazeStackFrame(MachineFunction &MF) const {
StackOffset += RegSize;
}
- if (MFI->hasCalls()) {
+ if (MFI->adjustsStack()) {
MBlazeFI->setRAStackOffset(0);
MFI->setObjectOffset(MFI->CreateStackObject(RegSize, RegSize, true),
StackOffset);
@@ -311,8 +311,8 @@ emitPrologue(MachineFunction &MF) const {
unsigned StackSize = MFI->getStackSize();
// No need to allocate space on the stack.
- if (StackSize == 0 && !MFI->hasCalls()) return;
- if (StackSize < 28 && MFI->hasCalls()) StackSize = 28;
+ if (StackSize == 0 && !MFI->adjustsStack()) return;
+ if (StackSize < 28 && MFI->adjustsStack()) StackSize = 28;
int FPOffset = MBlazeFI->getFPStackOffset();
int RAOffset = MBlazeFI->getRAStackOffset();
@@ -323,7 +323,7 @@ emitPrologue(MachineFunction &MF) const {
// Save the return address only if the function isnt a leaf one.
// swi R15, R1, stack_loc
- if (MFI->hasCalls()) {
+ if (MFI->adjustsStack()) {
BuildMI(MBB, MBBI, DL, TII.get(MBlaze::SWI))
.addReg(MBlaze::R15).addImm(RAOffset).addReg(MBlaze::R1);
}
@@ -366,14 +366,14 @@ emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const {
// Restore the return address only if the function isnt a leaf one.
// lwi R15, R1, stack_loc
- if (MFI->hasCalls()) {
+ if (MFI->adjustsStack()) {
BuildMI(MBB, MBBI, dl, TII.get(MBlaze::LWI), MBlaze::R15)
.addImm(RAOffset).addReg(MBlaze::R1);
}
// Get the number of bytes from FrameInfo
int StackSize = (int) MFI->getStackSize();
- if (StackSize < 28 && MFI->hasCalls()) StackSize = 28;
+ if (StackSize < 28 && MFI->adjustsStack()) StackSize = 28;
// adjust stack.
// addi R1, R1, imm
diff --git a/llvm/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp b/llvm/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
index d269153ef0e..4d7fe4cc826 100644
--- a/llvm/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
+++ b/llvm/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
@@ -145,7 +145,7 @@ void MipsAsmPrinter::printSavedRegsBitmask(raw_ostream &O) {
CPUBitmask |= (1 << MipsRegisterInfo::
getRegisterNumbering(RI.getFrameRegister(*MF)));
- if (MFI->hasCalls())
+ if (MFI->adjustsStack())
CPUBitmask |= (1 << MipsRegisterInfo::
getRegisterNumbering(RI.getRARegister()));
diff --git a/llvm/lib/Target/Mips/MipsRegisterInfo.cpp b/llvm/lib/Target/Mips/MipsRegisterInfo.cpp
index 478da84cad0..5e719af871d 100644
--- a/llvm/lib/Target/Mips/MipsRegisterInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsRegisterInfo.cpp
@@ -288,7 +288,7 @@ void MipsRegisterInfo::adjustMipsStackFrame(MachineFunction &MF) const
// Stack locations for FP and RA. If only one of them is used,
// the space must be allocated for both, otherwise no space at all.
- if (hasFP(MF) || MFI->hasCalls()) {
+ if (hasFP(MF) || MFI->adjustsStack()) {
// FP stack location
MFI->setObjectOffset(MFI->CreateStackObject(RegSize, RegSize, true),
StackOffset);
@@ -302,7 +302,7 @@ void MipsRegisterInfo::adjustMipsStackFrame(MachineFunction &MF) const
MipsFI->setRAStackOffset(StackOffset);
StackOffset += RegSize;
- if (MFI->hasCalls())
+ if (MFI->adjustsStack())
TopCPUSavedRegOff += RegSize;
}
@@ -407,7 +407,7 @@ emitPrologue(MachineFunction &MF) const
unsigned StackSize = MFI->getStackSize();
// No need to allocate space on the stack.
- if (StackSize == 0 && !MFI->hasCalls()) return;
+ if (StackSize == 0 && !MFI->adjustsStack()) return;
int FPOffset = MipsFI->getFPStackOffset();
int RAOffset = MipsFI->getRAStackOffset();
@@ -425,7 +425,7 @@ emitPrologue(MachineFunction &MF) const
// Save the return address only if the function isnt a leaf one.
// sw $ra, stack_loc($sp)
- if (MFI->hasCalls()) {
+ if (MFI->adjustsStack()) {
BuildMI(MBB, MBBI, dl, TII.get(Mips::SW))
.addReg(Mips::RA).addImm(RAOffset).addReg(Mips::SP);
}
@@ -477,7 +477,7 @@ emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const
// Restore the return address only if the function isnt a leaf one.
// lw $ra, stack_loc($sp)
- if (MFI->hasCalls()) {
+ if (MFI->adjustsStack()) {
BuildMI(MBB, MBBI, dl, TII.get(Mips::LW), Mips::RA)
.addImm(RAOffset).addReg(Mips::SP);
}
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
index 5f1e04eecb4..0bccf15c6ac 100644
--- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -1009,7 +1009,7 @@ void PPCRegisterInfo::determineFrameLayout(MachineFunction &MF) const {
if (!DisableRedZone &&
FrameSize <= 224 && // Fits in red zone.
!MFI->hasVarSizedObjects() && // No dynamic alloca.
- !MFI->hasCalls() && // No calls.
+ !MFI->adjustsStack() && // No calls.
(!ALIGN_STACK || MaxAlign <= TargetAlign)) { // No special alignment.
// No need for frame
MFI->setStackSize(0);
diff --git a/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp b/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
index 638fd17c995..420005b73e6 100644
--- a/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
@@ -102,7 +102,7 @@ int SystemZRegisterInfo::getFrameIndexOffset(const MachineFunction &MF,
Offset += StackSize - TFI.getOffsetOfLocalArea();
// Skip the register save area if we generated the stack frame.
- if (StackSize || MFI->hasCalls())
+ if (StackSize || MFI->adjustsStack())
Offset -= TFI.getOffsetOfLocalArea();
return Offset;
@@ -163,14 +163,14 @@ SystemZRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
for (unsigned i = 0, e = array_lengthof(HighFPRs); i != e; ++i)
HighFPRsUsed |= MRI.isPhysRegUsed(HighFPRs[i]);
- if (FFI->hasCalls())
+ if (FFI->adjustsStack())
/* FIXME: function is varargs */
/* FIXME: function grabs RA */
/* FIXME: function calls eh_return */
MRI.setPhysRegUsed(SystemZ::R14D);
if (HighFPRsUsed ||
- FFI->hasCalls() ||
+ FFI->adjustsStack() ||
FFI->getObjectIndexEnd() != 0 || // Contains automatic variables
FFI->hasVarSizedObjects() // Function calls dynamic alloca's
/* FIXME: function is varargs */)
@@ -234,7 +234,7 @@ void SystemZRegisterInfo::emitPrologue(MachineFunction &MF) const {
DL = MBBI->getDebugLoc();
// adjust stack pointer: R15 -= numbytes
- if (StackSize || MFI->hasCalls()) {
+ if (StackSize || MFI->adjustsStack()) {
assert(MF.getRegInfo().isPhysRegUsed(SystemZ::R15D) &&
"Invalid stack frame calculation!");
emitSPUpdate(MBB, MBBI, -(int64_t)NumBytes, TII);
@@ -286,7 +286,7 @@ void SystemZRegisterInfo::emitEpilogue(MachineFunction &MF,
// During callee-saved restores emission stack frame was not yet finialized
// (and thus - the stack size was unknown). Tune the offset having full stack
// size in hands.
- if (StackSize || MFI->hasCalls()) {
+ if (StackSize || MFI->adjustsStack()) {
assert((MBBI->getOpcode() == SystemZ::MOV64rmm ||
MBBI->getOpcode() == SystemZ::MOV64rm) &&
"Expected to see callee-save register restore code");
diff --git a/llvm/lib/Target/TargetMachine.cpp b/llvm/lib/Target/TargetMachine.cpp
index ac67c91f170..54650a059f8 100644
--- a/llvm/lib/Target/TargetMachine.cpp
+++ b/llvm/lib/Target/TargetMachine.cpp
@@ -277,7 +277,7 @@ namespace llvm {
return true;
if (NoFramePointerElimNonLeaf) {
const MachineFrameInfo *MFI = MF.getFrameInfo();
- return MFI->hasCalls();
+ return MFI->adjustsStack();
}
return false;
}
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 8821bef7461..4e2ff3ae2e4 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -5272,7 +5272,7 @@ GetTLSADDR(SelectionDAG &DAG, SDValue Chain, GlobalAddressSDNode *GA,
}
// TLSADDR will be codegen'ed as call. Inform MFI that function has calls.
- MFI->setHasCalls(true);
+ MFI->setAdjustsStack(true);
SDValue Flag = Chain.getValue(1);
return DAG.getCopyFromReg(Chain, dl, ReturnReg, PtrVT, Flag);
diff --git a/llvm/lib/Target/X86/X86RegisterInfo.cpp b/llvm/lib/Target/X86/X86RegisterInfo.cpp
index f24138ae1de..2db3c703cc9 100644
--- a/llvm/lib/Target/X86/X86RegisterInfo.cpp
+++ b/llvm/lib/Target/X86/X86RegisterInfo.cpp
@@ -898,7 +898,7 @@ void X86RegisterInfo::emitPrologue(MachineFunction &MF) const {
if (Is64Bit && !Fn->hasFnAttr(Attribute::NoRedZone) &&
!needsStackRealignment(MF) &&
!MFI->hasVarSizedObjects() && // No dynamic alloca.
- !MFI->hasCalls() && // No calls.
+ !MFI->adjustsStack() && // No calls.
!Subtarget->isTargetWin64()) { // Win64 has no Red Zone
uint64_t MinSize = X86FI->getCalleeSavedFrameSize();
if (HasFP) MinSize += SlotSize;
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