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-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp6
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.h2
-rw-r--r--llvm/lib/Target/Alpha/AlphaISelLowering.cpp73
-rw-r--r--llvm/lib/Target/Alpha/AlphaISelLowering.h10
-rw-r--r--llvm/lib/Target/PowerPC/PPCISelLowering.cpp2
-rw-r--r--llvm/lib/Target/PowerPC/PPCISelLowering.h2
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp5
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.h6
8 files changed, 60 insertions, 46 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index b19c1d7c7d3..57044e567d1 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -1418,9 +1418,9 @@ SDOperand ARMTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
}
-/// ExpandOperationResult - Provide custom lowering hooks for expanding
-/// operations.
-SDNode *ARMTargetLowering::ExpandOperationResult(SDNode *N, SelectionDAG &DAG) {
+/// ReplaceNodeResults - Provide custom lowering hooks for nodes with illegal
+/// result types.
+SDNode *ARMTargetLowering::ReplaceNodeResults(SDNode *N, SelectionDAG &DAG) {
switch (N->getOpcode()) {
default: assert(0 && "Don't know how to custom expand this!"); abort();
case ISD::BIT_CONVERT: return ExpandBIT_CONVERT(N, DAG);
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.h b/llvm/lib/Target/ARM/ARMISelLowering.h
index 8e5a8b36d5f..969d42b736f 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.h
+++ b/llvm/lib/Target/ARM/ARMISelLowering.h
@@ -76,7 +76,7 @@ namespace llvm {
explicit ARMTargetLowering(TargetMachine &TM);
virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG);
- virtual SDNode *ExpandOperationResult(SDNode *N, SelectionDAG &DAG);
+ virtual SDNode *ReplaceNodeResults(SDNode *N, SelectionDAG &DAG);
virtual SDOperand PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
diff --git a/llvm/lib/Target/Alpha/AlphaISelLowering.cpp b/llvm/lib/Target/Alpha/AlphaISelLowering.cpp
index 83c3a483bc2..bf3a31dab17 100644
--- a/llvm/lib/Target/Alpha/AlphaISelLowering.cpp
+++ b/llvm/lib/Target/Alpha/AlphaISelLowering.cpp
@@ -392,6 +392,34 @@ AlphaTargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
return std::make_pair(RetVal, Chain);
}
+void AlphaTargetLowering::LowerVAARG(SDNode *N, SDOperand &Chain,
+ SDOperand &DataPtr, SelectionDAG &DAG) {
+ Chain = N->getOperand(0);
+ SDOperand VAListP = N->getOperand(1);
+ const Value *VAListS = cast<SrcValueSDNode>(N->getOperand(2))->getValue();
+
+ SDOperand Base = DAG.getLoad(MVT::i64, Chain, VAListP, VAListS, 0);
+ SDOperand Tmp = DAG.getNode(ISD::ADD, MVT::i64, VAListP,
+ DAG.getConstant(8, MVT::i64));
+ SDOperand Offset = DAG.getExtLoad(ISD::SEXTLOAD, MVT::i64, Base.getValue(1),
+ Tmp, NULL, 0, MVT::i32);
+ DataPtr = DAG.getNode(ISD::ADD, MVT::i64, Base, Offset);
+ if (N->getValueType(0).isFloatingPoint())
+ {
+ //if fp && Offset < 6*8, then subtract 6*8 from DataPtr
+ SDOperand FPDataPtr = DAG.getNode(ISD::SUB, MVT::i64, DataPtr,
+ DAG.getConstant(8*6, MVT::i64));
+ SDOperand CC = DAG.getSetCC(MVT::i64, Offset,
+ DAG.getConstant(8*6, MVT::i64), ISD::SETLT);
+ DataPtr = DAG.getNode(ISD::SELECT, MVT::i64, CC, FPDataPtr, DataPtr);
+ }
+
+ SDOperand NewOffset = DAG.getNode(ISD::ADD, MVT::i64, Offset,
+ DAG.getConstant(8, MVT::i64));
+ Chain = DAG.getTruncStore(Offset.getValue(1), NewOffset, Tmp, NULL, 0,
+ MVT::i32);
+}
+
/// LowerOperation - Provide custom lowering hooks for some operations.
///
SDOperand AlphaTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
@@ -493,37 +521,15 @@ SDOperand AlphaTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
break;
case ISD::VAARG: {
- SDOperand Chain = Op.getOperand(0);
- SDOperand VAListP = Op.getOperand(1);
- const Value *VAListS = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
-
- SDOperand Base = DAG.getLoad(MVT::i64, Chain, VAListP, VAListS, 0);
- SDOperand Tmp = DAG.getNode(ISD::ADD, MVT::i64, VAListP,
- DAG.getConstant(8, MVT::i64));
- SDOperand Offset = DAG.getExtLoad(ISD::SEXTLOAD, MVT::i64, Base.getValue(1),
- Tmp, NULL, 0, MVT::i32);
- SDOperand DataPtr = DAG.getNode(ISD::ADD, MVT::i64, Base, Offset);
- if (Op.getValueType().isFloatingPoint())
- {
- //if fp && Offset < 6*8, then subtract 6*8 from DataPtr
- SDOperand FPDataPtr = DAG.getNode(ISD::SUB, MVT::i64, DataPtr,
- DAG.getConstant(8*6, MVT::i64));
- SDOperand CC = DAG.getSetCC(MVT::i64, Offset,
- DAG.getConstant(8*6, MVT::i64), ISD::SETLT);
- DataPtr = DAG.getNode(ISD::SELECT, MVT::i64, CC, FPDataPtr, DataPtr);
- }
+ SDOperand Chain, DataPtr;
+ LowerVAARG(Op.Val, Chain, DataPtr, DAG);
- SDOperand NewOffset = DAG.getNode(ISD::ADD, MVT::i64, Offset,
- DAG.getConstant(8, MVT::i64));
- SDOperand Update = DAG.getTruncStore(Offset.getValue(1), NewOffset,
- Tmp, NULL, 0, MVT::i32);
-
SDOperand Result;
if (Op.getValueType() == MVT::i32)
- Result = DAG.getExtLoad(ISD::SEXTLOAD, MVT::i64, Update, DataPtr,
+ Result = DAG.getExtLoad(ISD::SEXTLOAD, MVT::i64, Chain, DataPtr,
NULL, 0, MVT::i32);
else
- Result = DAG.getLoad(Op.getValueType(), Update, DataPtr, NULL, 0);
+ Result = DAG.getLoad(Op.getValueType(), Chain, DataPtr, NULL, 0);
return Result;
}
case ISD::VACOPY: {
@@ -564,14 +570,15 @@ SDOperand AlphaTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
return SDOperand();
}
-SDOperand AlphaTargetLowering::CustomPromoteOperation(SDOperand Op,
- SelectionDAG &DAG) {
- assert(Op.getValueType() == MVT::i32 &&
- Op.getOpcode() == ISD::VAARG &&
+SDNode *AlphaTargetLowering::ReplaceNodeResults(SDNode *N,
+ SelectionDAG &DAG) {
+ assert(N->getValueType(0) == MVT::i32 &&
+ N->getOpcode() == ISD::VAARG &&
"Unknown node to custom promote!");
-
- // The code in LowerOperation already handles i32 vaarg
- return LowerOperation(Op, DAG);
+
+ SDOperand Chain, DataPtr;
+ LowerVAARG(N, Chain, DataPtr, DAG);
+ return DAG.getLoad(N->getValueType(0), Chain, DataPtr, NULL, 0).Val;
}
diff --git a/llvm/lib/Target/Alpha/AlphaISelLowering.h b/llvm/lib/Target/Alpha/AlphaISelLowering.h
index f88437e92e3..1440908c4f9 100644
--- a/llvm/lib/Target/Alpha/AlphaISelLowering.h
+++ b/llvm/lib/Target/Alpha/AlphaISelLowering.h
@@ -72,9 +72,9 @@ namespace llvm {
/// LowerOperation - Provide custom lowering hooks for some operations.
///
virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG);
- virtual SDOperand CustomPromoteOperation(SDOperand Op, SelectionDAG &DAG);
+ virtual SDNode *ReplaceNodeResults(SDNode *N, SelectionDAG &DAG);
- //Friendly names for dumps
+ // Friendly names for dumps
const char *getTargetNodeName(unsigned Opcode) const;
/// LowerCallTo - This hook lowers an abstract call to a function into an
@@ -94,6 +94,12 @@ namespace llvm {
MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI,
MachineBasicBlock *BB);
+
+ private:
+ // Helpers for custom lowering.
+ void LowerVAARG(SDNode *N, SDOperand &Chain, SDOperand &DataPtr,
+ SelectionDAG &DAG);
+
};
}
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 4b2267d8122..d44dc5dcd4f 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -3964,7 +3964,7 @@ SDOperand PPCTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
return SDOperand();
}
-SDNode *PPCTargetLowering::ExpandOperationResult(SDNode *N, SelectionDAG &DAG) {
+SDNode *PPCTargetLowering::ReplaceNodeResults(SDNode *N, SelectionDAG &DAG) {
switch (N->getOpcode()) {
default: assert(0 && "Wasn't expecting to be able to lower this!");
case ISD::FP_TO_SINT: return LowerFP_TO_SINT(SDOperand(N, 0), DAG).Val;
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.h b/llvm/lib/Target/PowerPC/PPCISelLowering.h
index e3ec7b0e3be..a620f414f23 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.h
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.h
@@ -273,7 +273,7 @@ namespace llvm {
///
virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG);
- virtual SDNode *ExpandOperationResult(SDNode *N, SelectionDAG &DAG);
+ virtual SDNode *ReplaceNodeResults(SDNode *N, SelectionDAG &DAG);
virtual SDOperand PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 9b57f3ac43a..c80c5476700 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -5762,8 +5762,9 @@ SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
}
}
-/// ExpandOperation - Provide custom lowering hooks for expanding operations.
-SDNode *X86TargetLowering::ExpandOperationResult(SDNode *N, SelectionDAG &DAG) {
+/// ReplaceNodeResults - Replace a node with an illegal result type
+/// with a new node built out of custom code.
+SDNode *X86TargetLowering::ReplaceNodeResults(SDNode *N, SelectionDAG &DAG) {
switch (N->getOpcode()) {
default: assert(0 && "Should not custom lower this!");
case ISD::FP_TO_SINT: return ExpandFP_TO_SINT(N, DAG);
diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h
index dff4beadbf7..648fe3bb1d2 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.h
+++ b/llvm/lib/Target/X86/X86ISelLowering.h
@@ -352,10 +352,10 @@ namespace llvm {
///
virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG);
- /// ExpandOperation - Custom lower the specified operation, splitting the
- /// value into two pieces.
+ /// ReplaceNodeResults - Replace a node with an illegal result type
+ /// with a new node built out of custom code.
///
- virtual SDNode *ExpandOperationResult(SDNode *N, SelectionDAG &DAG);
+ virtual SDNode *ReplaceNodeResults(SDNode *N, SelectionDAG &DAG);
virtual SDOperand PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
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