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-rw-r--r--llvm/lib/Target/Mips/MipsCondMov.td14
-rw-r--r--llvm/lib/Target/Mips/MipsISelLowering.cpp3
-rw-r--r--llvm/lib/Target/Mips/MipsInstrFPU.td4
-rw-r--r--llvm/lib/Target/Mips/MipsInstrFormats.td6
4 files changed, 14 insertions, 13 deletions
diff --git a/llvm/lib/Target/Mips/MipsCondMov.td b/llvm/lib/Target/Mips/MipsCondMov.td
index 8f5c4dcb445..607c2a9e235 100644
--- a/llvm/lib/Target/Mips/MipsCondMov.td
+++ b/llvm/lib/Target/Mips/MipsCondMov.td
@@ -34,20 +34,18 @@ class CMov_I_F_FT<string opstr, RegisterOperand CRC, RegisterOperand DRC,
// cond:float, data:int
class CMov_F_I_FT<string opstr, RegisterOperand RC, InstrItinClass Itin,
SDPatternOperator OpNode = null_frag> :
- InstSE<(outs RC:$rd), (ins RC:$rs, RC:$F),
- !strconcat(opstr, "\t$rd, $rs, $$fcc0"),
- [(set RC:$rd, (OpNode RC:$rs, RC:$F))], Itin, FrmFR> {
- let Uses = [FCC0];
+ InstSE<(outs RC:$rd), (ins RC:$rs, FCC:$fcc, RC:$F),
+ !strconcat(opstr, "\t$rd, $rs, $fcc"),
+ [(set RC:$rd, (OpNode RC:$rs, FCC:$fcc, RC:$F))], Itin, FrmFR> {
let Constraints = "$F = $rd";
}
// cond:float, data:float
class CMov_F_F_FT<string opstr, RegisterClass RC, InstrItinClass Itin,
SDPatternOperator OpNode = null_frag> :
- InstSE<(outs RC:$fd), (ins RC:$fs, RC:$F),
- !strconcat(opstr, "\t$fd, $fs, $$fcc0"),
- [(set RC:$fd, (OpNode RC:$fs, RC:$F))], Itin, FrmFR> {
- let Uses = [FCC0];
+ InstSE<(outs RC:$fd), (ins RC:$fs, FCC:$fcc, RC:$F),
+ !strconcat(opstr, "\t$fd, $fs, $fcc"),
+ [(set RC:$fd, (OpNode RC:$fs, FCC:$fcc, RC:$F))], Itin, FrmFR> {
let Constraints = "$F = $fd";
}
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp
index 10efc8adea2..8bf4249af1e 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp
@@ -519,9 +519,10 @@ static SDValue createCMovFP(SelectionDAG &DAG, SDValue Cond, SDValue True,
SDValue False, SDLoc DL) {
ConstantSDNode *CC = cast<ConstantSDNode>(Cond.getOperand(2));
bool invert = invertFPCondCodeUser((Mips::CondCode)CC->getSExtValue());
+ SDValue FCC0 = DAG.getRegister(Mips::FCC0, MVT::i32);
return DAG.getNode((invert ? MipsISD::CMovFP_F : MipsISD::CMovFP_T), DL,
- True.getValueType(), True, False, Cond);
+ True.getValueType(), True, FCC0, False, Cond);
}
static SDValue performSELECTCombine(SDNode *N, SelectionDAG &DAG,
diff --git a/llvm/lib/Target/Mips/MipsInstrFPU.td b/llvm/lib/Target/Mips/MipsInstrFPU.td
index 3975de08145..ce68a28dfcf 100644
--- a/llvm/lib/Target/Mips/MipsInstrFPU.td
+++ b/llvm/lib/Target/Mips/MipsInstrFPU.td
@@ -29,8 +29,8 @@ def SDT_MipsFPBrcond : SDTypeProfile<0, 3, [SDTCisInt<0>,
SDTCisVT<2, OtherVT>]>;
def SDT_MipsFPCmp : SDTypeProfile<0, 3, [SDTCisSameAs<0, 1>, SDTCisFP<1>,
SDTCisVT<2, i32>]>;
-def SDT_MipsCMovFP : SDTypeProfile<1, 2, [SDTCisSameAs<0, 1>,
- SDTCisSameAs<1, 2>]>;
+def SDT_MipsCMovFP : SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>, SDTCisVT<2, i32>,
+ SDTCisSameAs<1, 3>]>;
def SDT_MipsTruncIntFP : SDTypeProfile<1, 1, [SDTCisFP<0>, SDTCisFP<1>]>;
def SDT_MipsBuildPairF64 : SDTypeProfile<1, 2, [SDTCisVT<0, f64>,
SDTCisVT<1, i32>,
diff --git a/llvm/lib/Target/Mips/MipsInstrFormats.td b/llvm/lib/Target/Mips/MipsInstrFormats.td
index 61b01c0874c..fb55cd29025 100644
--- a/llvm/lib/Target/Mips/MipsInstrFormats.td
+++ b/llvm/lib/Target/Mips/MipsInstrFormats.td
@@ -716,12 +716,13 @@ class CMov_I_F_FM<bits<6> funct, bits<5> fmt> {
class CMov_F_I_FM<bit tf> {
bits<5> rd;
bits<5> rs;
+ bits<3> fcc;
bits<32> Inst;
let Inst{31-26} = 0;
let Inst{25-21} = rs;
- let Inst{20-18} = 0; // cc
+ let Inst{20-18} = fcc;
let Inst{17} = 0;
let Inst{16} = tf;
let Inst{15-11} = rd;
@@ -732,12 +733,13 @@ class CMov_F_I_FM<bit tf> {
class CMov_F_F_FM<bits<5> fmt, bit tf> {
bits<5> fd;
bits<5> fs;
+ bits<3> fcc;
bits<32> Inst;
let Inst{31-26} = 0x11;
let Inst{25-21} = fmt;
- let Inst{20-18} = 0; // cc
+ let Inst{20-18} = fcc;
let Inst{17} = 0;
let Inst{16} = tf;
let Inst{15-11} = fs;
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