diff options
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/Sparc/README.txt | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/Sparc/SparcInstr64Bit.td | 4 |
2 files changed, 2 insertions, 4 deletions
diff --git a/llvm/lib/Target/Sparc/README.txt b/llvm/lib/Target/Sparc/README.txt index b4991fe5790..c831367e436 100644 --- a/llvm/lib/Target/Sparc/README.txt +++ b/llvm/lib/Target/Sparc/README.txt @@ -57,3 +57,5 @@ int %t1(int %a, int %b) { * Fill delay slots * Implement JIT support + +* Use %g0 directly to materialize 0. No instruction is required. diff --git a/llvm/lib/Target/Sparc/SparcInstr64Bit.td b/llvm/lib/Target/Sparc/SparcInstr64Bit.td index 3af494ee0c7..daafb432372 100644 --- a/llvm/lib/Target/Sparc/SparcInstr64Bit.td +++ b/llvm/lib/Target/Sparc/SparcInstr64Bit.td @@ -59,10 +59,6 @@ defm SRAX : F3_S<"srax", 0b100111, 1, sra, i64, I64Regs>; // preferable to use a constant pool load instead, depending on the // microarchitecture. -// The %g0 register is constant 0. -// This is useful for stx %g0, [...], for example. -def : Pat<(i64 0), (i64 G0)>, Requires<[Is64Bit]>; - // Single-instruction patterns. // The ALU instructions want their simm13 operands as i32 immediates. |
