diff options
Diffstat (limited to 'llvm/lib/Target')
22 files changed, 131 insertions, 90 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp index 98a08e12d68..309a5c6eb5d 100644 --- a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp @@ -903,7 +903,8 @@ emitLoadConstPool(MachineBasicBlock &MBB, unsigned PredReg) const { MachineFunction &MF = *MBB.getParent(); MachineConstantPool *ConstantPool = MF.getConstantPool(); - Constant *C = ConstantInt::get(Type::Int32Ty, Val); + Constant *C = + ConstantInt::get(Type::getInt32Ty(MF.getFunction()->getContext()), Val); unsigned Idx = ConstantPool->getConstantPoolIndex(C, 4); BuildMI(MBB, MBBI, dl, TII.get(ARM::LDRcp)) diff --git a/llvm/lib/Target/ARM/ARMCodeEmitter.cpp b/llvm/lib/Target/ARM/ARMCodeEmitter.cpp index d5f9cd1314f..6218fceac1c 100644 --- a/llvm/lib/Target/ARM/ARMCodeEmitter.cpp +++ b/llvm/lib/Target/ARM/ARMCodeEmitter.cpp @@ -456,9 +456,9 @@ void Emitter<CodeEmitter>::emitConstPoolInstruction(const MachineInstr &MI) { uint32_t Val = *(uint32_t*)CI->getValue().getRawData(); emitWordLE(Val); } else if (const ConstantFP *CFP = dyn_cast<ConstantFP>(CV)) { - if (CFP->getType() == Type::FloatTy) + if (CFP->getType() == Type::getFloatTy(CFP->getContext())) emitWordLE(CFP->getValueAPF().bitcastToAPInt().getZExtValue()); - else if (CFP->getType() == Type::DoubleTy) + else if (CFP->getType() == Type::getDoubleTy(CFP->getContext())) emitDWordLE(CFP->getValueAPF().bitcastToAPInt().getZExtValue()); else { llvm_unreachable("Unable to handle this constantpool entry!"); diff --git a/llvm/lib/Target/ARM/ARMConstantPoolValue.cpp b/llvm/lib/Target/ARM/ARMConstantPoolValue.cpp index 8e85d3dec6a..9697422c6dc 100644 --- a/llvm/lib/Target/ARM/ARMConstantPoolValue.cpp +++ b/llvm/lib/Target/ARM/ARMConstantPoolValue.cpp @@ -29,19 +29,20 @@ ARMConstantPoolValue::ARMConstantPoolValue(GlobalValue *gv, unsigned id, GV(gv), S(NULL), LabelId(id), Kind(k), PCAdjust(PCAdj), Modifier(Modif), AddCurrentAddress(AddCA) {} -ARMConstantPoolValue::ARMConstantPoolValue(const char *s, unsigned id, +ARMConstantPoolValue::ARMConstantPoolValue(LLVMContext &C, + const char *s, unsigned id, ARMCP::ARMCPKind k, unsigned char PCAdj, const char *Modif, bool AddCA) - : MachineConstantPoolValue((const Type*)Type::Int32Ty), + : MachineConstantPoolValue((const Type*)Type::getInt32Ty(C)), GV(NULL), S(strdup(s)), LabelId(id), Kind(k), PCAdjust(PCAdj), Modifier(Modif), AddCurrentAddress(AddCA) {} ARMConstantPoolValue::ARMConstantPoolValue(GlobalValue *gv, ARMCP::ARMCPKind k, const char *Modif) - : MachineConstantPoolValue((const Type*)Type::Int32Ty), + : MachineConstantPoolValue((const Type*)Type::getInt32Ty(gv->getContext())), GV(gv), S(NULL), LabelId(0), Kind(k), PCAdjust(0), Modifier(Modif) {} diff --git a/llvm/lib/Target/ARM/ARMConstantPoolValue.h b/llvm/lib/Target/ARM/ARMConstantPoolValue.h index 77516e58e0d..13683a30078 100644 --- a/llvm/lib/Target/ARM/ARMConstantPoolValue.h +++ b/llvm/lib/Target/ARM/ARMConstantPoolValue.h @@ -20,6 +20,7 @@ namespace llvm { class GlobalValue; +class LLVMContext; namespace ARMCP { enum ARMCPKind { @@ -47,7 +48,7 @@ public: ARMCP::ARMCPKind Kind = ARMCP::CPValue, unsigned char PCAdj = 0, const char *Modifier = NULL, bool AddCurrentAddress = false); - ARMConstantPoolValue(const char *s, unsigned id, + ARMConstantPoolValue(LLVMContext &C, const char *s, unsigned id, ARMCP::ARMCPKind Kind = ARMCP::CPValue, unsigned char PCAdj = 0, const char *Modifier = NULL, bool AddCurrentAddress = false); diff --git a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp index 608488397e4..9ca80ae1b91 100644 --- a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -952,7 +952,8 @@ SDNode *ARMDAGToDAGISel::Select(SDValue Op) { !ARM_AM::isSOImmTwoPartVal(Val)); // two instrs. if (UseCP) { SDValue CPIdx = - CurDAG->getTargetConstantPool(ConstantInt::get(Type::Int32Ty, Val), + CurDAG->getTargetConstantPool(ConstantInt::get( + Type::getInt32Ty(*CurDAG->getContext()), Val), TLI.getPointerTy()); SDNode *ResNode; diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index 14cab0986b9..a36fdbf2474 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -985,7 +985,8 @@ ARMTargetLowering::LowerCall(SDValue Chain, SDValue Callee, // tBX takes a register source operand. const char *Sym = S->getSymbol(); if (isARMFunc && Subtarget->isThumb1Only() && !Subtarget->hasV5TOps()) { - ARMConstantPoolValue *CPV = new ARMConstantPoolValue(Sym, ARMPCLabelIndex, + ARMConstantPoolValue *CPV = new ARMConstantPoolValue(*DAG.getContext(), + Sym, ARMPCLabelIndex, ARMCP::CPStub, 4); SDValue CPAddr = DAG.getTargetConstantPool(CPV, getPointerTy(), 4); CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); @@ -1177,11 +1178,11 @@ ARMTargetLowering::LowerToTLSGeneralDynamicModel(GlobalAddressSDNode *GA, ArgListTy Args; ArgListEntry Entry; Entry.Node = Argument; - Entry.Ty = (const Type *) Type::Int32Ty; + Entry.Ty = (const Type *) Type::getInt32Ty(*DAG.getContext()); Args.push_back(Entry); // FIXME: is there useful debug info available here? std::pair<SDValue, SDValue> CallResult = - LowerCallTo(Chain, (const Type *) Type::Int32Ty, false, false, false, false, + LowerCallTo(Chain, (const Type *) Type::getInt32Ty(*DAG.getContext()), false, false, false, false, 0, CallingConv::C, false, /*isReturnValueUsed=*/true, DAG.getExternalSymbol("__tls_get_addr", PtrVT), Args, DAG, dl); return CallResult.first; @@ -1322,7 +1323,8 @@ SDValue ARMTargetLowering::LowerGLOBAL_OFFSET_TABLE(SDValue Op, EVT PtrVT = getPointerTy(); DebugLoc dl = Op.getDebugLoc(); unsigned PCAdj = Subtarget->isThumb() ? 4 : 8; - ARMConstantPoolValue *CPV = new ARMConstantPoolValue("_GLOBAL_OFFSET_TABLE_", + ARMConstantPoolValue *CPV = new ARMConstantPoolValue(*DAG.getContext(), + "_GLOBAL_OFFSET_TABLE_", ARMPCLabelIndex, ARMCP::CPValue, PCAdj); SDValue CPAddr = DAG.getTargetConstantPool(CPV, PtrVT, 4); @@ -1411,7 +1413,8 @@ ARMTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) { std::string LSDAName = "L_lsda_"; LSDAName += MF.getFunction()->getName(); ARMConstantPoolValue *CPV = - new ARMConstantPoolValue(LSDAName.c_str(), ARMPCLabelIndex, Kind, PCAdj); + new ARMConstantPoolValue(*DAG.getContext(), LSDAName.c_str(), + ARMPCLabelIndex, Kind, PCAdj); CPAddr = DAG.getTargetConstantPool(CPV, PtrVT, 4); CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); SDValue Result = diff --git a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index 11d4887e259..3c6778fe8cd 100644 --- a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -19,6 +19,7 @@ #include "ARMMachineFunctionInfo.h" #include "ARMRegisterInfo.h" #include "llvm/DerivedTypes.h" +#include "llvm/Function.h" #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstr.h" @@ -1183,7 +1184,9 @@ ARMPreAllocLoadStoreOpt::CanFormLdStDWord(MachineInstr *Op0, MachineInstr *Op1, unsigned Align = Op0->memoperands_begin()->getAlignment(); unsigned ReqAlign = STI->hasV6Ops() - ? TD->getPrefTypeAlignment(Type::Int64Ty) : 8; // Pre-v6 need 8-byte align + ? TD->getPrefTypeAlignment( + Type::getInt64Ty(Op0->getParent()->getParent()->getFunction()->getContext())) + : 8; // Pre-v6 need 8-byte align if (Align < ReqAlign) return false; diff --git a/llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp b/llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp index b11d4c35ac0..796057f9c53 100644 --- a/llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp +++ b/llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp @@ -58,7 +58,8 @@ void Thumb1RegisterInfo::emitLoadConstPool(MachineBasicBlock &MBB, unsigned PredReg) const { MachineFunction &MF = *MBB.getParent(); MachineConstantPool *ConstantPool = MF.getConstantPool(); - Constant *C = ConstantInt::get(Type::Int32Ty, Val); + Constant *C = ConstantInt::get( + Type::getInt32Ty(MBB.getParent()->getFunction()->getContext()), Val); unsigned Idx = ConstantPool->getConstantPoolIndex(C, 4); BuildMI(MBB, MBBI, dl, TII.get(ARM::tLDRcp)) diff --git a/llvm/lib/Target/ARM/Thumb2RegisterInfo.cpp b/llvm/lib/Target/ARM/Thumb2RegisterInfo.cpp index 98be2041fd3..6c4c15dfe35 100644 --- a/llvm/lib/Target/ARM/Thumb2RegisterInfo.cpp +++ b/llvm/lib/Target/ARM/Thumb2RegisterInfo.cpp @@ -52,7 +52,8 @@ void Thumb2RegisterInfo::emitLoadConstPool(MachineBasicBlock &MBB, unsigned PredReg) const { MachineFunction &MF = *MBB.getParent(); MachineConstantPool *ConstantPool = MF.getConstantPool(); - Constant *C = ConstantInt::get(Type::Int32Ty, Val); + Constant *C = ConstantInt::get( + Type::getInt32Ty(MBB.getParent()->getFunction()->getContext()), Val); unsigned Idx = ConstantPool->getConstantPoolIndex(C, 4); BuildMI(MBB, MBBI, dl, TII.get(ARM::t2LDRpci)) diff --git a/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp b/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp index c72e0f04815..ff1eefb8ce2 100644 --- a/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp +++ b/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp @@ -305,7 +305,8 @@ SDNode *AlphaDAGToDAGISel::Select(SDValue Op) { // val32 >= IMM_LOW + IMM_LOW * IMM_MULT) //always true break; //(zext (LDAH (LDA))) //Else use the constant pool - ConstantInt *C = ConstantInt::get(Type::Int64Ty, uval); + ConstantInt *C = ConstantInt::get( + Type::getInt64Ty(*CurDAG->getContext()), uval); SDValue CPI = CurDAG->getTargetConstantPool(C, MVT::i64); SDNode *Tmp = CurDAG->getTargetNode(Alpha::LDAHr, dl, MVT::i64, CPI, SDValue(getGlobalBaseReg(), 0)); diff --git a/llvm/lib/Target/CBackend/CBackend.cpp b/llvm/lib/Target/CBackend/CBackend.cpp index 937a93f18a1..f4418040e18 100644 --- a/llvm/lib/Target/CBackend/CBackend.cpp +++ b/llvm/lib/Target/CBackend/CBackend.cpp @@ -236,7 +236,7 @@ namespace { // Must be an expression, must be used exactly once. If it is dead, we // emit it inline where it would go. - if (I.getType() == Type::VoidTy || !I.hasOneUse() || + if (I.getType() == Type::getVoidTy(I.getContext()) || !I.hasOneUse() || isa<TerminatorInst>(I) || isa<CallInst>(I) || isa<PHINode>(I) || isa<LoadInst>(I) || isa<VAArgInst>(I) || isa<InsertElementInst>(I) || isa<InsertValueInst>(I)) @@ -772,7 +772,8 @@ void CWriter::printConstantArray(ConstantArray *CPA, bool Static) { // ubytes or an array of sbytes with positive values. // const Type *ETy = CPA->getType()->getElementType(); - bool isString = (ETy == Type::Int8Ty || ETy == Type::Int8Ty); + bool isString = (ETy == Type::getInt8Ty(CPA->getContext()) || + ETy == Type::getInt8Ty(CPA->getContext())); // Make sure the last character is a null char, as automatically added by C if (isString && (CPA->getNumOperands() == 0 || @@ -858,10 +859,11 @@ void CWriter::printConstantVector(ConstantVector *CP, bool Static) { static bool isFPCSafeToPrint(const ConstantFP *CFP) { bool ignored; // Do long doubles in hex for now. - if (CFP->getType() != Type::FloatTy && CFP->getType() != Type::DoubleTy) + if (CFP->getType() != Type::getFloatTy(CFP->getContext()) && + CFP->getType() != Type::getDoubleTy(CFP->getContext())) return false; APFloat APF = APFloat(CFP->getValueAPF()); // copy - if (CFP->getType() == Type::FloatTy) + if (CFP->getType() == Type::getFloatTy(CFP->getContext())) APF.convert(APFloat::IEEEdouble, APFloat::rmNearestTiesToEven, &ignored); #if HAVE_PRINTF_A && ENABLE_CBE_PRINTF_A char Buffer[100]; @@ -973,12 +975,12 @@ void CWriter::printConstant(Constant *CPV, bool Static) { Out << "("; printCast(CE->getOpcode(), CE->getOperand(0)->getType(), CE->getType()); if (CE->getOpcode() == Instruction::SExt && - CE->getOperand(0)->getType() == Type::Int1Ty) { + CE->getOperand(0)->getType() == Type::getInt1Ty(CPV->getContext())) { // Make sure we really sext from bool here by subtracting from 0 Out << "0-"; } printConstant(CE->getOperand(0), Static); - if (CE->getType() == Type::Int1Ty && + if (CE->getType() == Type::getInt1Ty(CPV->getContext()) && (CE->getOpcode() == Instruction::Trunc || CE->getOpcode() == Instruction::FPToUI || CE->getOpcode() == Instruction::FPToSI || @@ -1127,9 +1129,9 @@ void CWriter::printConstant(Constant *CPV, bool Static) { if (ConstantInt *CI = dyn_cast<ConstantInt>(CPV)) { const Type* Ty = CI->getType(); - if (Ty == Type::Int1Ty) + if (Ty == Type::getInt1Ty(CPV->getContext())) Out << (CI->getZExtValue() ? '1' : '0'); - else if (Ty == Type::Int32Ty) + else if (Ty == Type::getInt32Ty(CPV->getContext())) Out << CI->getZExtValue() << 'u'; else if (Ty->getPrimitiveSizeInBits() > 32) Out << CI->getZExtValue() << "ull"; @@ -1156,15 +1158,17 @@ void CWriter::printConstant(Constant *CPV, bool Static) { if (I != FPConstantMap.end()) { // Because of FP precision problems we must load from a stack allocated // value that holds the value in hex. - Out << "(*(" << (FPC->getType() == Type::FloatTy ? "float" : - FPC->getType() == Type::DoubleTy ? "double" : + Out << "(*(" << (FPC->getType() == Type::getFloatTy(CPV->getContext()) ? + "float" : + FPC->getType() == Type::getDoubleTy(CPV->getContext()) ? + "double" : "long double") << "*)&FPConstant" << I->second << ')'; } else { double V; - if (FPC->getType() == Type::FloatTy) + if (FPC->getType() == Type::getFloatTy(CPV->getContext())) V = FPC->getValueAPF().convertToFloat(); - else if (FPC->getType() == Type::DoubleTy) + else if (FPC->getType() == Type::getDoubleTy(CPV->getContext())) V = FPC->getValueAPF().convertToDouble(); else { // Long double. Convert the number to double, discarding precision. @@ -1194,7 +1198,7 @@ void CWriter::printConstant(Constant *CPV, bool Static) { std::string Num(&Buffer[0], &Buffer[6]); unsigned long Val = strtoul(Num.c_str(), 0, 16); - if (FPC->getType() == Type::FloatTy) + if (FPC->getType() == Type::getFloatTy(FPC->getContext())) Out << "LLVM_NAN" << (Val == QuietNaN ? "" : "S") << "F(\"" << Buffer << "\") /*nan*/ "; else @@ -1203,7 +1207,8 @@ void CWriter::printConstant(Constant *CPV, bool Static) { } else if (IsInf(V)) { // The value is Inf if (V < 0) Out << '-'; - Out << "LLVM_INF" << (FPC->getType() == Type::FloatTy ? "F" : "") + Out << "LLVM_INF" << + (FPC->getType() == Type::getFloatTy(FPC->getContext()) ? "F" : "") << " /*inf*/ "; } else { std::string Num; @@ -1366,7 +1371,7 @@ bool CWriter::printConstExprCast(const ConstantExpr* CE, bool Static) { } if (NeedsExplicitCast) { Out << "(("; - if (Ty->isInteger() && Ty != Type::Int1Ty) + if (Ty->isInteger() && Ty != Type::getInt1Ty(Ty->getContext())) printSimpleType(Out, Ty, TypeIsSigned); else printType(Out, Ty); // not integer, sign doesn't matter @@ -1464,8 +1469,11 @@ void CWriter::writeInstComputationInline(Instruction &I) { // We can't currently support integer types other than 1, 8, 16, 32, 64. // Validate this. const Type *Ty = I.getType(); - if (Ty->isInteger() && (Ty!=Type::Int1Ty && Ty!=Type::Int8Ty && - Ty!=Type::Int16Ty && Ty!=Type::Int32Ty && Ty!=Type::Int64Ty)) { + if (Ty->isInteger() && (Ty!=Type::getInt1Ty(I.getContext()) && + Ty!=Type::getInt8Ty(I.getContext()) && + Ty!=Type::getInt16Ty(I.getContext()) && + Ty!=Type::getInt32Ty(I.getContext()) && + Ty!=Type::getInt64Ty(I.getContext()))) { llvm_report_error("The C backend does not currently support integer " "types of widths other than 1, 8, 16, 32, 64.\n" "This is being tracked as PR 4158."); @@ -1475,7 +1483,8 @@ void CWriter::writeInstComputationInline(Instruction &I) { // a 1 bit value. This is important because we want "add i1 x, y" to return // "0" when x and y are true, not "2" for example. bool NeedBoolTrunc = false; - if (I.getType() == Type::Int1Ty && !isa<ICmpInst>(I) && !isa<FCmpInst>(I)) + if (I.getType() == Type::getInt1Ty(I.getContext()) && + !isa<ICmpInst>(I) && !isa<FCmpInst>(I)) NeedBoolTrunc = true; if (NeedBoolTrunc) @@ -1624,7 +1633,7 @@ void CWriter::writeOperandWithCast(Value* Operand, const ICmpInst &Cmp) { // If the operand was a pointer, convert to a large integer type. const Type* OpTy = Operand->getType(); if (isa<PointerType>(OpTy)) - OpTy = TD->getIntPtrType(); + OpTy = TD->getIntPtrType(Operand->getContext()); Out << "(("; printSimpleType(Out, OpTy, castIsSigned); @@ -2143,20 +2152,20 @@ void CWriter::printFloatingPointConstants(const Constant *C) { FPConstantMap[FPC] = FPCounter; // Number the FP constants - if (FPC->getType() == Type::DoubleTy) { + if (FPC->getType() == Type::getDoubleTy(FPC->getContext())) { double Val = FPC->getValueAPF().convertToDouble(); uint64_t i = FPC->getValueAPF().bitcastToAPInt().getZExtValue(); Out << "static const ConstantDoubleTy FPConstant" << FPCounter++ << " = 0x" << utohexstr(i) << "ULL; /* " << Val << " */\n"; - } else if (FPC->getType() == Type::FloatTy) { + } else if (FPC->getType() == Type::getFloatTy(FPC->getContext())) { float Val = FPC->getValueAPF().convertToFloat(); uint32_t i = (uint32_t)FPC->getValueAPF().bitcastToAPInt(). getZExtValue(); Out << "static const ConstantFloatTy FPConstant" << FPCounter++ << " = 0x" << utohexstr(i) << "U; /* " << Val << " */\n"; - } else if (FPC->getType() == Type::X86_FP80Ty) { + } else if (FPC->getType() == Type::getX86_FP80Ty(FPC->getContext())) { // api needed to prevent premature destruction APInt api = FPC->getValueAPF().bitcastToAPInt(); const uint64_t *p = api.getRawData(); @@ -2164,7 +2173,7 @@ void CWriter::printFloatingPointConstants(const Constant *C) { << " = { 0x" << utohexstr(p[0]) << "ULL, 0x" << utohexstr((uint16_t)p[1]) << ",{0,0,0}" << "}; /* Long double constant */\n"; - } else if (FPC->getType() == Type::PPC_FP128Ty) { + } else if (FPC->getType() == Type::getPPC_FP128Ty(FPC->getContext())) { APInt api = FPC->getValueAPF().bitcastToAPInt(); const uint64_t *p = api.getRawData(); Out << "static const ConstantFP128Ty FPConstant" << FPCounter++ @@ -2409,7 +2418,8 @@ void CWriter::printFunction(Function &F) { printType(Out, AI->getAllocatedType(), false, GetValueName(AI)); Out << "; /* Address-exposed local */\n"; PrintedVar = true; - } else if (I->getType() != Type::VoidTy && !isInlinableInst(*I)) { + } else if (I->getType() != Type::getVoidTy(F.getContext()) && + !isInlinableInst(*I)) { Out << " "; printType(Out, I->getType(), false, GetValueName(&*I)); Out << ";\n"; @@ -2486,7 +2496,8 @@ void CWriter::printBasicBlock(BasicBlock *BB) { for (BasicBlock::iterator II = BB->begin(), E = --BB->end(); II != E; ++II) { if (!isInlinableInst(*II) && !isDirectAlloca(II)) { - if (II->getType() != Type::VoidTy && !isInlineAsm(*II)) + if (II->getType() != Type::getVoidTy(BB->getContext()) && + !isInlineAsm(*II)) outputLValue(II); else Out << " "; @@ -2661,8 +2672,9 @@ void CWriter::visitBinaryOperator(Instruction &I) { // We must cast the results of binary operations which might be promoted. bool needsCast = false; - if ((I.getType() == Type::Int8Ty) || (I.getType() == Type::Int16Ty) - || (I.getType() == Type::FloatTy)) { + if ((I.getType() == Type::getInt8Ty(I.getContext())) || + (I.getType() == Type::getInt16Ty(I.getContext())) + || (I.getType() == Type::getFloatTy(I.getContext()))) { needsCast = true; Out << "(("; printType(Out, I.getType(), false); @@ -2681,9 +2693,9 @@ void CWriter::visitBinaryOperator(Instruction &I) { Out << ")"; } else if (I.getOpcode() == Instruction::FRem) { // Output a call to fmod/fmodf instead of emitting a%b - if (I.getType() == Type::FloatTy) + if (I.getType() == Type::getFloatTy(I.getContext())) Out << "fmodf("; - else if (I.getType() == Type::DoubleTy) + else if (I.getType() == Type::getDoubleTy(I.getContext())) Out << "fmod("; else // all 3 flavors of long double Out << "fmodl("; @@ -2850,12 +2862,13 @@ void CWriter::visitCastInst(CastInst &I) { printCast(I.getOpcode(), SrcTy, DstTy); // Make a sext from i1 work by subtracting the i1 from 0 (an int). - if (SrcTy == Type::Int1Ty && I.getOpcode() == Instruction::SExt) + if (SrcTy == Type::getInt1Ty(I.getContext()) && + I.getOpcode() == Instruction::SExt) Out << "0-"; writeOperand(I.getOperand(0)); - if (DstTy == Type::Int1Ty && + if (DstTy == Type::getInt1Ty(I.getContext()) && (I.getOpcode() == Instruction::Trunc || I.getOpcode() == Instruction::FPToUI || I.getOpcode() == Instruction::FPToSI || @@ -3280,7 +3293,7 @@ void CWriter::visitInlineAsm(CallInst &CI) { std::vector<InlineAsm::ConstraintInfo> Constraints = as->ParseConstraints(); std::vector<std::pair<Value*, int> > ResultVals; - if (CI.getType() == Type::VoidTy) + if (CI.getType() == Type::getVoidTy(CI.getContext())) ; else if (const StructType *ST = dyn_cast<StructType>(CI.getType())) { for (unsigned i = 0, e = ST->getNumElements(); i != e; ++i) diff --git a/llvm/lib/Target/CppBackend/CPPBackend.cpp b/llvm/lib/Target/CppBackend/CPPBackend.cpp index c467ead8bb4..98baa95e863 100644 --- a/llvm/lib/Target/CppBackend/CPPBackend.cpp +++ b/llvm/lib/Target/CppBackend/CPPBackend.cpp @@ -221,7 +221,7 @@ namespace { void CppWriter::printCFP(const ConstantFP *CFP) { bool ignored; APFloat APF = APFloat(CFP->getValueAPF()); // copy - if (CFP->getType() == Type::FloatTy) + if (CFP->getType() == Type::getFloatTy(CFP->getContext())) APF.convert(APFloat::IEEEdouble, APFloat::rmNearestTiesToEven, &ignored); Out << "ConstantFP::get("; Out << "APFloat("; @@ -232,7 +232,7 @@ namespace { !strncmp(Buffer, "-0x", 3) || !strncmp(Buffer, "+0x", 3)) && APF.bitwiseIsEqual(APFloat(atof(Buffer)))) { - if (CFP->getType() == Type::DoubleTy) + if (CFP->getType() == Type::getDoubleTy(CFP->getContext())) Out << "BitsToDouble(" << Buffer << ")"; else Out << "BitsToFloat((float)" << Buffer << ")"; @@ -250,11 +250,11 @@ namespace { ((StrVal[0] == '-' || StrVal[0] == '+') && (StrVal[1] >= '0' && StrVal[1] <= '9'))) && (CFP->isExactlyValue(atof(StrVal.c_str())))) { - if (CFP->getType() == Type::DoubleTy) + if (CFP->getType() == Type::getDoubleTy(CFP->getContext())) Out << StrVal; else Out << StrVal << "f"; - } else if (CFP->getType() == Type::DoubleTy) + } else if (CFP->getType() == Type::getDoubleTy(CFP->getContext())) Out << "BitsToDouble(0x" << utohexstr(CFP->getValueAPF().bitcastToAPInt().getZExtValue()) << "ULL) /* " << StrVal << " */"; @@ -764,7 +764,9 @@ namespace { printCFP(CFP); Out << ";"; } else if (const ConstantArray *CA = dyn_cast<ConstantArray>(CV)) { - if (CA->isString() && CA->getType()->getElementType() == Type::Int8Ty) { + if (CA->isString() && + CA->getType()->getElementType() == + Type::getInt8Ty(CA->getContext())) { Out << "Constant* " << constName << " = ConstantArray::get(\""; std::string tmp = CA->getAsString(); bool nullTerminate = false; diff --git a/llvm/lib/Target/MSIL/MSILWriter.cpp b/llvm/lib/Target/MSIL/MSILWriter.cpp index 226d146a0e3..93e59f71d4c 100644 --- a/llvm/lib/Target/MSIL/MSILWriter.cpp +++ b/llvm/lib/Target/MSIL/MSILWriter.cpp @@ -820,7 +820,8 @@ void MSILWriter::printIntrinsicCall(const IntrinsicInst* Inst) { // Save as pointer type "void*" printValueLoad(Inst->getOperand(1)); printSimpleInstruction("ldloca",Name.c_str()); - printIndirectSave(PointerType::getUnqual(IntegerType::get(8))); + printIndirectSave(PointerType::getUnqual( + IntegerType::get(Inst->getContext(), 8))); break; case Intrinsic::vaend: // Close argument list handle. @@ -1041,7 +1042,8 @@ void MSILWriter::printVAArgInstruction(const VAArgInst* Inst) { "instance typedref [mscorlib]System.ArgIterator::GetNextArg()"); printSimpleInstruction("refanyval","void*"); std::string Name = - "ldind."+getTypePostfix(PointerType::getUnqual(IntegerType::get(8)),false); + "ldind."+getTypePostfix(PointerType::getUnqual( + IntegerType::get(Inst->getContext(), 8)),false); printSimpleInstruction(Name.c_str()); } @@ -1237,7 +1239,7 @@ void MSILWriter::printBasicBlock(const BasicBlock* BB) { // Print instruction printInstruction(Inst); // Save result - if (Inst->getType()!=Type::VoidTy) { + if (Inst->getType()!=Type::getVoidTy(BB->getContext())) { // Do not save value after invoke, it done in "try" block if (Inst->getOpcode()==Instruction::Invoke) continue; printValueSave(Inst); @@ -1266,7 +1268,7 @@ void MSILWriter::printLocalVariables(const Function& F) { Ty = PointerType::getUnqual(AI->getAllocatedType()); Name = getValueName(AI); Out << "\t.locals (" << getTypeName(Ty) << Name << ")\n"; - } else if (I->getType()!=Type::VoidTy) { + } else if (I->getType()!=Type::getVoidTy(F.getContext())) { // Operation result. Ty = I->getType(); Name = getValueName(&*I); diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 11c4093634c..569026fbb7c 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -1269,7 +1269,8 @@ SDValue PPCTargetLowering::LowerTRAMPOLINE(SDValue Op, SelectionDAG &DAG) { EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); bool isPPC64 = (PtrVT == MVT::i64); const Type *IntPtrTy = - DAG.getTargetLoweringInfo().getTargetData()->getIntPtrType(); + DAG.getTargetLoweringInfo().getTargetData()->getIntPtrType( + *DAG.getContext()); TargetLowering::ArgListTy Args; TargetLowering::ArgListEntry Entry; diff --git a/llvm/lib/Target/Target.cpp b/llvm/lib/Target/Target.cpp index ed544b73eae..cc6be9fa7ab 100644 --- a/llvm/lib/Target/Target.cpp +++ b/llvm/lib/Target/Target.cpp @@ -41,7 +41,7 @@ unsigned LLVMPointerSize(LLVMTargetDataRef TD) { } LLVMTypeRef LLVMIntPtrType(LLVMTargetDataRef TD) { - return wrap(unwrap(TD)->getIntPtrType()); + return wrap(unwrap(TD)->getIntPtrType(getGlobalContext())); } unsigned long long LLVMSizeOfTypeInBits(LLVMTargetDataRef TD, LLVMTypeRef Ty) { diff --git a/llvm/lib/Target/TargetData.cpp b/llvm/lib/Target/TargetData.cpp index 3f1979bc29b..838c675d1b7 100644 --- a/llvm/lib/Target/TargetData.cpp +++ b/llvm/lib/Target/TargetData.cpp @@ -541,8 +541,8 @@ unsigned char TargetData::getPreferredTypeAlignmentShift(const Type *Ty) const { /// getIntPtrType - Return an unsigned integer type that is the same size or /// greater to the host pointer size. -const IntegerType *TargetData::getIntPtrType() const { - return IntegerType::get(getPointerSizeInBits()); +const IntegerType *TargetData::getIntPtrType(LLVMContext &C) const { + return IntegerType::get(C, getPointerSizeInBits()); } @@ -556,7 +556,8 @@ uint64_t TargetData::getIndexedOffset(const Type *ptrTy, Value* const* Indices, TI = gep_type_begin(ptrTy, Indices, Indices+NumIndices); for (unsigned CurIDX = 0; CurIDX != NumIndices; ++CurIDX, ++TI) { if (const StructType *STy = dyn_cast<StructType>(*TI)) { - assert(Indices[CurIDX]->getType() == Type::Int32Ty && + assert(Indices[CurIDX]->getType() == + Type::getInt32Ty(ptrTy->getContext()) && "Illegal struct idx"); unsigned FieldNo = cast<ConstantInt>(Indices[CurIDX])->getZExtValue(); diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp index b98a9738c64..5e9a39f0562 100644 --- a/llvm/lib/Target/X86/X86FastISel.cpp +++ b/llvm/lib/Target/X86/X86FastISel.cpp @@ -272,7 +272,7 @@ bool X86FastISel::X86FastEmitStore(EVT VT, Value *Val, const X86AddressMode &AM) { // Handle 'null' like i32/i64 0. if (isa<ConstantPointerNull>(Val)) - Val = Constant::getNullValue(TD.getIntPtrType()); + Val = Constant::getNullValue(TD.getIntPtrType(Val->getContext())); // If this is a store of a simple constant, fold the constant into the store. if (ConstantInt *CI = dyn_cast<ConstantInt>(Val)) { @@ -672,7 +672,7 @@ bool X86FastISel::X86FastEmitCompare(Value *Op0, Value *Op1, EVT VT) { // Handle 'null' like i32/i64 0. if (isa<ConstantPointerNull>(Op1)) - Op1 = Constant::getNullValue(TD.getIntPtrType()); + Op1 = Constant::getNullValue(TD.getIntPtrType(Op0->getContext())); // We have two options: compare with register or immediate. If the RHS of // the compare is an immediate that we can fold into this compare, use @@ -773,8 +773,8 @@ bool X86FastISel::X86SelectCmp(Instruction *I) { bool X86FastISel::X86SelectZExt(Instruction *I) { // Handle zero-extension from i1 to i8, which is common. - if (I->getType() == Type::Int8Ty && - I->getOperand(0)->getType() == Type::Int1Ty) { + if (I->getType() == Type::getInt8Ty(I->getContext()) && + I->getOperand(0)->getType() == Type::getInt1Ty(I->getContext())) { unsigned ResultReg = getRegForValue(I->getOperand(0)); if (ResultReg == 0) return false; // Set the high bits to zero. @@ -935,7 +935,7 @@ bool X86FastISel::X86SelectBranch(Instruction *I) { bool X86FastISel::X86SelectShift(Instruction *I) { unsigned CReg = 0, OpReg = 0, OpImm = 0; const TargetRegisterClass *RC = NULL; - if (I->getType() == Type::Int8Ty) { + if (I->getType() == Type::getInt8Ty(I->getContext())) { CReg = X86::CL; RC = &X86::GR8RegClass; switch (I->getOpcode()) { @@ -944,7 +944,7 @@ bool X86FastISel::X86SelectShift(Instruction *I) { case Instruction::Shl: OpReg = X86::SHL8rCL; OpImm = X86::SHL8ri; break; default: return false; } - } else if (I->getType() == Type::Int16Ty) { + } else if (I->getType() == Type::getInt16Ty(I->getContext())) { CReg = X86::CX; RC = &X86::GR16RegClass; switch (I->getOpcode()) { @@ -953,7 +953,7 @@ bool X86FastISel::X86SelectShift(Instruction *I) { case Instruction::Shl: OpReg = X86::SHL16rCL; OpImm = X86::SHL16ri; break; default: return false; } - } else if (I->getType() == Type::Int32Ty) { + } else if (I->getType() == Type::getInt32Ty(I->getContext())) { CReg = X86::ECX; RC = &X86::GR32RegClass; switch (I->getOpcode()) { @@ -962,7 +962,7 @@ bool X86FastISel::X86SelectShift(Instruction *I) { case Instruction::Shl: OpReg = X86::SHL32rCL; OpImm = X86::SHL32ri; break; default: return false; } - } else if (I->getType() == Type::Int64Ty) { + } else if (I->getType() == Type::getInt64Ty(I->getContext())) { CReg = X86::RCX; RC = &X86::GR64RegClass; switch (I->getOpcode()) { @@ -1044,9 +1044,10 @@ bool X86FastISel::X86SelectSelect(Instruction *I) { bool X86FastISel::X86SelectFPExt(Instruction *I) { // fpext from float to double. - if (Subtarget->hasSSE2() && I->getType() == Type::DoubleTy) { + if (Subtarget->hasSSE2() && + I->getType() == Type::getDoubleTy(I->getContext())) { Value *V = I->getOperand(0); - if (V->getType() == Type::FloatTy) { + if (V->getType() == Type::getFloatTy(I->getContext())) { unsigned OpReg = getRegForValue(V); if (OpReg == 0) return false; unsigned ResultReg = createResultReg(X86::FR64RegisterClass); @@ -1061,9 +1062,9 @@ bool X86FastISel::X86SelectFPExt(Instruction *I) { bool X86FastISel::X86SelectFPTrunc(Instruction *I) { if (Subtarget->hasSSE2()) { - if (I->getType() == Type::FloatTy) { + if (I->getType() == Type::getFloatTy(I->getContext())) { Value *V = I->getOperand(0); - if (V->getType() == Type::DoubleTy) { + if (V->getType() == Type::getDoubleTy(I->getContext())) { unsigned OpReg = getRegForValue(V); if (OpReg == 0) return false; unsigned ResultReg = createResultReg(X86::FR32RegisterClass); @@ -1230,7 +1231,7 @@ bool X86FastISel::X86SelectCall(Instruction *I) { // Handle *simple* calls for now. const Type *RetTy = CS.getType(); EVT RetVT; - if (RetTy == Type::VoidTy) + if (RetTy == Type::getVoidTy(I->getContext())) RetVT = MVT::isVoid; else if (!isTypeLegal(RetTy, RetVT, true)) return false; diff --git a/llvm/lib/Target/X86/X86FloatingPointRegKill.cpp b/llvm/lib/Target/X86/X86FloatingPointRegKill.cpp index 292f8f432d6..3e0385c79c1 100644 --- a/llvm/lib/Target/X86/X86FloatingPointRegKill.cpp +++ b/llvm/lib/Target/X86/X86FloatingPointRegKill.cpp @@ -118,9 +118,10 @@ bool FPRegKiller::runOnMachineFunction(MachineFunction &MF) { !ContainsFPCode && SI != E; ++SI) { for (BasicBlock::const_iterator II = SI->begin(); (PN = dyn_cast<PHINode>(II)); ++II) { - if (PN->getType()==Type::X86_FP80Ty || + if (PN->getType()==Type::getX86_FP80Ty(LLVMBB->getContext()) || (!Subtarget.hasSSE1() && PN->getType()->isFloatingPoint()) || - (!Subtarget.hasSSE2() && PN->getType()==Type::DoubleTy)) { + (!Subtarget.hasSSE2() && + PN->getType()==Type::getDoubleTy(LLVMBB->getContext()))) { ContainsFPCode = true; break; } diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 7507eb2a1bb..ca6ff929a77 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -5831,7 +5831,7 @@ X86TargetLowering::EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl, if (const char *bzeroEntry = V && V->isNullValue() ? Subtarget->getBZeroEntry() : 0) { EVT IntPtr = getPointerTy(); - const Type *IntPtrTy = TD->getIntPtrType(); + const Type *IntPtrTy = TD->getIntPtrType(*DAG.getContext()); TargetLowering::ArgListTy Args; TargetLowering::ArgListEntry Entry; Entry.Node = Dst; @@ -5840,7 +5840,8 @@ X86TargetLowering::EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl, Entry.Node = Size; Args.push_back(Entry); std::pair<SDValue,SDValue> CallResult = - LowerCallTo(Chain, Type::VoidTy, false, false, false, false, + LowerCallTo(Chain, Type::getVoidTy(*DAG.getContext()), + false, false, false, false, 0, CallingConv::C, false, /*isReturnValueUsed=*/false, DAG.getExternalSymbol(bzeroEntry, IntPtr), Args, DAG, dl); return CallResult.second; @@ -7159,7 +7160,8 @@ bool X86TargetLowering::isTruncateFree(EVT VT1, EVT VT2) const { bool X86TargetLowering::isZExtFree(const Type *Ty1, const Type *Ty2) const { // x86-64 implicitly zero-extends 32-bit results in 64-bit registers. - return Ty1 == Type::Int32Ty && Ty2 == Type::Int64Ty && Subtarget->is64Bit(); + return Ty1 == Type::getInt32Ty(Ty1->getContext()) && + Ty2 == Type::getInt64Ty(Ty1->getContext()) && Subtarget->is64Bit(); } bool X86TargetLowering::isZExtFree(EVT VT1, EVT VT2) const { @@ -8768,7 +8770,7 @@ bool X86TargetLowering::ExpandInlineAsm(CallInst *CI) const { return LowerToBSwap(CI); } // rorw $$8, ${0:w} --> llvm.bswap.i16 - if (CI->getType() == Type::Int16Ty && + if (CI->getType() == Type::getInt16Ty(CI->getContext()) && AsmPieces.size() == 3 && AsmPieces[0] == "rorw" && AsmPieces[1] == "$$8," && @@ -8778,7 +8780,8 @@ bool X86TargetLowering::ExpandInlineAsm(CallInst *CI) const { } break; case 3: - if (CI->getType() == Type::Int64Ty && Constraints.size() >= 2 && + if (CI->getType() == Type::getInt64Ty(CI->getContext()) && + Constraints.size() >= 2 && Constraints[0].Codes.size() == 1 && Constraints[0].Codes[0] == "A" && Constraints[1].Codes.size() == 1 && Constraints[1].Codes[0] == "0") { // bswap %eax / bswap %edx / xchgl %eax, %edx -> llvm.bswap.i64 @@ -8896,7 +8899,8 @@ void X86TargetLowering::LowerAsmOperandForConstraint(SDValue Op, // 32-bit signed value if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) { const ConstantInt *CI = C->getConstantIntValue(); - if (CI->isValueValidForType(Type::Int32Ty, C->getSExtValue())) { + if (CI->isValueValidForType(Type::getInt32Ty(*DAG.getContext()), + C->getSExtValue())) { // Widen to 64 bits here to get it sign extended. Result = DAG.getTargetConstant(C->getSExtValue(), MVT::i64); break; @@ -8910,7 +8914,8 @@ void X86TargetLowering::LowerAsmOperandForConstraint(SDValue Op, // 32-bit unsigned value if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) { const ConstantInt *CI = C->getConstantIntValue(); - if (CI->isValueValidForType(Type::Int32Ty, C->getZExtValue())) { + if (CI->isValueValidForType(Type::getInt32Ty(*DAG.getContext()), + C->getZExtValue())) { Result = DAG.getTargetConstant(C->getZExtValue(), Op.getValueType()); break; } diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index 297c4dd175c..6e8561d8e44 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -2299,7 +2299,8 @@ MachineInstr* X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF, // Create a v4i32 constant-pool entry. MachineConstantPool &MCP = *MF.getConstantPool(); - const VectorType *Ty = VectorType::get(Type::Int32Ty, 4); + const VectorType *Ty = + VectorType::get(Type::getInt32Ty(MF.getFunction()->getContext()), 4); Constant *C = LoadMI->getOpcode() == X86::V_SET0 ? Constant::getNullValue(Ty) : Constant::getAllOnesValue(Ty); diff --git a/llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp b/llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp index 5d6702b4dad..1a5f10291f5 100644 --- a/llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp +++ b/llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp @@ -174,7 +174,8 @@ SDNode *XCoreDAGToDAGISel::Select(SDValue Op) { else if (! Predicate_immU16(N)) { unsigned Val = cast<ConstantSDNode>(N)->getZExtValue(); SDValue CPIdx = - CurDAG->getTargetConstantPool(ConstantInt::get(Type::Int32Ty, Val), + CurDAG->getTargetConstantPool(ConstantInt::get( + Type::getInt32Ty(*CurDAG->getContext()), Val), TLI.getPointerTy()); return CurDAG->getTargetNode(XCore::LDWCP_lru6, dl, MVT::i32, MVT::Other, CPIdx, diff --git a/llvm/lib/Target/XCore/XCoreISelLowering.cpp b/llvm/lib/Target/XCore/XCoreISelLowering.cpp index e9ca3f59830..0174778a1d4 100644 --- a/llvm/lib/Target/XCore/XCoreISelLowering.cpp +++ b/llvm/lib/Target/XCore/XCoreISelLowering.cpp @@ -438,7 +438,7 @@ LowerLOAD(SDValue Op, SelectionDAG &DAG) } // Lower to a call to __misaligned_load(BasePtr). - const Type *IntPtrTy = getTargetData()->getIntPtrType(); + const Type *IntPtrTy = getTargetData()->getIntPtrType(*DAG.getContext()); TargetLowering::ArgListTy Args; TargetLowering::ArgListEntry Entry; @@ -496,7 +496,7 @@ LowerSTORE(SDValue Op, SelectionDAG &DAG) } // Lower to a call to __misaligned_store(BasePtr, Value). - const Type *IntPtrTy = getTargetData()->getIntPtrType(); + const Type *IntPtrTy = getTargetData()->getIntPtrType(*DAG.getContext()); TargetLowering::ArgListTy Args; TargetLowering::ArgListEntry Entry; @@ -508,7 +508,7 @@ LowerSTORE(SDValue Op, SelectionDAG &DAG) Args.push_back(Entry); std::pair<SDValue, SDValue> CallResult = - LowerCallTo(Chain, Type::VoidTy, false, false, + LowerCallTo(Chain, Type::getVoidTy(*DAG.getContext()), false, false, false, false, 0, CallingConv::C, false, /*isReturnValueUsed=*/true, DAG.getExternalSymbol("__misaligned_store", getPointerTy()), |
