diff options
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 22 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.h | 2 | 
2 files changed, 24 insertions, 0 deletions
| diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index 7694378b480..3cf8d8809bb 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -10077,6 +10077,28 @@ bool ARMTargetLowering::isZExtFree(SDValue Val, EVT VT2) const {    return false;  } +bool ARMTargetLowering::isVectorLoadExtDesirable(SDValue ExtVal) const { +  EVT VT = ExtVal.getValueType(); + +  if (!isTypeLegal(VT)) +    return false; + +  // Don't create a loadext if we can fold the extension into a wide/long +  // instruction. +  // If there's more than one user instruction, the loadext is desirable no +  // matter what.  There can be two uses by the same instruction. +  if (ExtVal->use_empty() || +      !ExtVal->use_begin()->isOnlyUserOf(ExtVal.getNode())) +    return true; + +  SDNode *U = *ExtVal->use_begin(); +  if ((U->getOpcode() == ISD::ADD || U->getOpcode() == ISD::SUB || +       U->getOpcode() == ISD::SHL || U->getOpcode() == ARMISD::VSHL)) +    return false; + +  return true; +} +  bool ARMTargetLowering::allowTruncateForTailCall(Type *Ty1, Type *Ty2) const {    if (!Ty1->isIntegerTy() || !Ty2->isIntegerTy())      return false; diff --git a/llvm/lib/Target/ARM/ARMISelLowering.h b/llvm/lib/Target/ARM/ARMISelLowering.h index 7fd2725b7e5..6977862fe35 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.h +++ b/llvm/lib/Target/ARM/ARMISelLowering.h @@ -283,6 +283,8 @@ namespace llvm {      using TargetLowering::isZExtFree;      bool isZExtFree(SDValue Val, EVT VT2) const override; +    bool isVectorLoadExtDesirable(SDValue ExtVal) const override; +      bool allowTruncateForTailCall(Type *Ty1, Type *Ty2) const override; | 

