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-rw-r--r--llvm/lib/Target/Mips/MipsFastISel.cpp19
-rw-r--r--llvm/lib/Target/Mips/MipsISelLowering.cpp16
2 files changed, 13 insertions, 22 deletions
diff --git a/llvm/lib/Target/Mips/MipsFastISel.cpp b/llvm/lib/Target/Mips/MipsFastISel.cpp
index 1581bc9c58a..895d0f7a607 100644
--- a/llvm/lib/Target/Mips/MipsFastISel.cpp
+++ b/llvm/lib/Target/Mips/MipsFastISel.cpp
@@ -102,7 +102,6 @@ class MipsFastISel final : public FastISel {
bool fastLowerCall(CallLoweringInfo &CLI) override;
bool fastLowerIntrinsicCall(const IntrinsicInst *II) override;
- bool TargetSupported;
bool UnsupportedFPMode; // To allow fast-isel to proceed and just not handle
// floating point but not reject doing fast-isel in other
// situations
@@ -212,10 +211,6 @@ public:
TII(*Subtarget->getInstrInfo()), TLI(*Subtarget->getTargetLowering()) {
MFI = funcInfo.MF->getInfo<MipsFunctionInfo>();
Context = &funcInfo.Fn->getContext();
- bool ISASupported = !Subtarget->hasMips32r6() &&
- !Subtarget->inMicroMipsMode() && Subtarget->hasMips32();
- TargetSupported =
- ISASupported && TM.isPositionIndependent() && getABI().IsO32();
UnsupportedFPMode = Subtarget->isFP64bit() || Subtarget->useSoftFloat();
}
@@ -291,9 +286,6 @@ unsigned MipsFastISel::emitLogicalOp(unsigned ISDOpc, MVT RetVT,
}
unsigned MipsFastISel::fastMaterializeAlloca(const AllocaInst *AI) {
- if (!TargetSupported)
- return 0;
-
assert(TLI.getValueType(DL, AI->getType(), true) == MVT::i32 &&
"Alloca should always return a pointer.");
@@ -404,9 +396,6 @@ unsigned MipsFastISel::materializeExternalCallSym(MCSymbol *Sym) {
// Materialize a constant into a register, and return the register
// number (or zero if we failed to handle it).
unsigned MipsFastISel::fastMaterializeConstant(const Constant *C) {
- if (!TargetSupported)
- return 0;
-
EVT CEVT = TLI.getValueType(DL, C->getType(), true);
// Only handle simple types.
@@ -1444,9 +1433,6 @@ bool MipsFastISel::fastLowerArguments() {
}
bool MipsFastISel::fastLowerCall(CallLoweringInfo &CLI) {
- if (!TargetSupported)
- return false;
-
CallingConv::ID CC = CLI.CallConv;
bool IsTailCall = CLI.IsTailCall;
bool IsVarArg = CLI.IsVarArg;
@@ -1531,9 +1517,6 @@ bool MipsFastISel::fastLowerCall(CallLoweringInfo &CLI) {
}
bool MipsFastISel::fastLowerIntrinsicCall(const IntrinsicInst *II) {
- if (!TargetSupported)
- return false;
-
switch (II->getIntrinsicID()) {
default:
return false;
@@ -1980,8 +1963,6 @@ bool MipsFastISel::selectShift(const Instruction *I) {
}
bool MipsFastISel::fastSelectInstruction(const Instruction *I) {
- if (!TargetSupported)
- return false;
switch (I->getOpcode()) {
default:
break;
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp
index fcd0450a067..be98b58fc2f 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp
@@ -458,9 +458,19 @@ const MipsTargetLowering *MipsTargetLowering::create(const MipsTargetMachine &TM
FastISel *
MipsTargetLowering::createFastISel(FunctionLoweringInfo &funcInfo,
const TargetLibraryInfo *libInfo) const {
- if (!funcInfo.MF->getTarget().Options.EnableFastISel)
- return TargetLowering::createFastISel(funcInfo, libInfo);
- return Mips::createFastISel(funcInfo, libInfo);
+ const MipsTargetMachine &TM =
+ static_cast<const MipsTargetMachine &>(funcInfo.MF->getTarget());
+
+ // We support only the standard encoding [MIPS32,MIPS32R5] ISAs.
+ bool UseFastISel = TM.Options.EnableFastISel && Subtarget.hasMips32() &&
+ !Subtarget.hasMips32r6() && !Subtarget.inMips16Mode() &&
+ !Subtarget.inMicroMipsMode();
+
+ // Disable if we don't generate PIC or the ABI isn't O32.
+ if (!TM.isPositionIndependent() || !TM.getABI().IsO32())
+ UseFastISel = false;
+
+ return UseFastISel ? Mips::createFastISel(funcInfo, libInfo) : nullptr;
}
EVT MipsTargetLowering::getSetCCResultType(const DataLayout &, LLVMContext &,
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