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-rw-r--r--llvm/lib/Target/X86/X86InstrFMA3Info.cpp36
-rw-r--r--llvm/lib/Target/X86/X86InstrFMA3Info.h81
-rw-r--r--llvm/lib/Target/X86/X86InstrInfo.cpp12
3 files changed, 30 insertions, 99 deletions
diff --git a/llvm/lib/Target/X86/X86InstrFMA3Info.cpp b/llvm/lib/Target/X86/X86InstrFMA3Info.cpp
index 3819e5791d6..9d37d06e0c8 100644
--- a/llvm/lib/Target/X86/X86InstrFMA3Info.cpp
+++ b/llvm/lib/Target/X86/X86InstrFMA3Info.cpp
@@ -26,27 +26,28 @@ X86InstrFMA3Info *X86InstrFMA3Info::getX86InstrFMA3Info() {
return &*X86InstrFMA3InfoObj;
}
-#define FMA3BASE(R132, R213, R231, M132, M213, M231, Attrs) \
- { { R132, R213, R231 }, { M132, M213, M231 }, Attrs },
-
-#define FMA3RMA(R132, R213, R231, M132, M213, M231, Attrs) \
- FMA3BASE(X86::R132, X86::R213, X86::R231, X86::M132, X86::M213, X86::M231, Attrs)
-
-#define FMA3RM(R132, R213, R231, M132, M213, M231) \
- FMA3RMA(R132, R213, R231, M132, M213, M231, 0)
+#define FMA3BASE(X132, X213, X231, Attrs) \
+ { { X132, X213, X231 }, Attrs },
#define FMA3RA(R132, R213, R231, Attrs) \
- FMA3BASE(X86::R132, X86::R213, X86::R231, 0, 0, 0, Attrs)
+ FMA3BASE(X86::R132, X86::R213, X86::R231, Attrs)
#define FMA3R(R132, R213, R231) \
FMA3RA(R132, R213, R231, 0)
#define FMA3MA(M132, M213, M231, Attrs) \
- FMA3BASE(0, 0, 0, X86::M132, X86::M213, X86::M231, Attrs)
+ FMA3BASE(X86::M132, X86::M213, X86::M231, Attrs)
#define FMA3M(M132, M213, M231) \
FMA3MA(M132, M213, M231, 0)
+#define FMA3RMA(R132, R213, R231, M132, M213, M231, Attrs) \
+ FMA3RA(R132, R213, R231, Attrs) \
+ FMA3MA(M132, M213, M231, Attrs)
+
+#define FMA3RM(R132, R213, R231, M132, M213, M231) \
+ FMA3RMA(R132, R213, R231, M132, M213, M231, 0)
+
#define FMA3_AVX2_VECTOR_GROUP(Name) \
FMA3RM(Name##132PSr, Name##213PSr, Name##231PSr, \
Name##132PSm, Name##213PSm, Name##231PSm) \
@@ -231,17 +232,8 @@ static const X86InstrFMA3Group Groups[] = {
X86InstrFMA3Info::X86InstrFMA3Info() {
for (const X86InstrFMA3Group &G : Groups) {
- if (G.RegOpcodes[0])
- OpcodeToGroup[G.RegOpcodes[0]] = &G;
- if (G.RegOpcodes[1])
- OpcodeToGroup[G.RegOpcodes[1]] = &G;
- if (G.RegOpcodes[2])
- OpcodeToGroup[G.RegOpcodes[2]] = &G;
- if (G.MemOpcodes[0])
- OpcodeToGroup[G.MemOpcodes[0]] = &G;
- if (G.MemOpcodes[1])
- OpcodeToGroup[G.MemOpcodes[1]] = &G;
- if (G.MemOpcodes[2])
- OpcodeToGroup[G.MemOpcodes[2]] = &G;
+ OpcodeToGroup[G.Opcodes[0]] = &G;
+ OpcodeToGroup[G.Opcodes[1]] = &G;
+ OpcodeToGroup[G.Opcodes[2]] = &G;
}
}
diff --git a/llvm/lib/Target/X86/X86InstrFMA3Info.h b/llvm/lib/Target/X86/X86InstrFMA3Info.h
index 2557d7919dc..91e5d2a177b 100644
--- a/llvm/lib/Target/X86/X86InstrFMA3Info.h
+++ b/llvm/lib/Target/X86/X86InstrFMA3Info.h
@@ -24,17 +24,11 @@
namespace llvm {
/// This class is used to group {132, 213, 231} forms of FMA opcodes together.
-/// Each of the groups has either 3 register opcodes, 3 memory opcodes,
-/// or 6 register and memory opcodes. Also, each group has an attrubutes field
-/// describing it.
+/// Each of the groups has either 3 opcodes, Also, each group has an attributes
+/// field describing it.
struct X86InstrFMA3Group {
- /// An array holding 3 forms of register FMA opcodes.
- /// Entries will be 0 if there are no register opcodes in the group.
- uint16_t RegOpcodes[3];
-
- /// An array holding 3 forms of memory FMA opcodes.
- /// Entries will be 0 if there are no register opcodes in the group.
- uint16_t MemOpcodes[3];
+ /// An array holding 3 forms of FMA opcodes.
+ uint16_t Opcodes[3];
/// This bitfield specifies the attributes associated with the created
/// FMA groups of opcodes.
@@ -62,50 +56,19 @@ struct X86InstrFMA3Group {
X86FMA3KZeroMasked = 0x4,
};
- /// Returns a memory form opcode that is the equivalent of the given register
- /// form opcode \p RegOpcode. 0 is returned if the group does not have
- /// either register of memory opcodes.
- unsigned getMemOpcode(unsigned RegOpcode) const {
- for (unsigned Form = 0; Form < 3; Form++)
- if (RegOpcodes[Form] == RegOpcode)
- return MemOpcodes[Form];
- return 0;
- }
-
- /// Returns the 132 form of FMA register opcode.
- unsigned getReg132Opcode() const {
- assert(RegOpcodes[Form132] && "The group does not have register opcodes.");
- return RegOpcodes[Form132];
- }
-
- /// Returns the 213 form of FMA register opcode.
- unsigned getReg213Opcode() const {
- assert(RegOpcodes[Form213] && "The group does not have register opcodes.");
- return RegOpcodes[Form213];
- }
-
- /// Returns the 231 form of FMA register opcode.
- unsigned getReg231Opcode() const {
- assert(RegOpcodes[Form231] && "The group does not have register opcodes.");
- return RegOpcodes[Form231];
+ /// Returns the 132 form of FMA opcode.
+ unsigned get132Opcode() const {
+ return Opcodes[Form132];
}
- /// Returns the 132 form of FMA memory opcode.
- unsigned getMem132Opcode() const {
- assert(MemOpcodes[Form132] && "The group does not have memory opcodes.");
- return MemOpcodes[Form132];
+ /// Returns the 213 form of FMA opcode.
+ unsigned get213Opcode() const {
+ return Opcodes[Form213];
}
- /// Returns the 213 form of FMA memory opcode.
- unsigned getMem213Opcode() const {
- assert(MemOpcodes[Form213] && "The group does not have memory opcodes.");
- return MemOpcodes[Form213];
- }
-
- /// Returns the 231 form of FMA memory opcode.
- unsigned getMem231Opcode() const {
- assert(MemOpcodes[Form231] && "The group does not have memory opcodes.");
- return MemOpcodes[Form231];
+ /// Returns the 231 form of FMA opcode.
+ unsigned get231Opcode() const {
+ return Opcodes[Form231];
}
/// Returns true iff the group of FMA opcodes holds intrinsic opcodes.
@@ -123,24 +86,6 @@ struct X86InstrFMA3Group {
bool isKMasked() const {
return (Attributes & (X86FMA3KMergeMasked | X86FMA3KZeroMasked)) != 0;
}
-
- /// Returns true iff the given \p Opcode is a register opcode from the
- /// groups of FMA opcodes.
- bool isRegOpcodeFromGroup(unsigned Opcode) const {
- for (unsigned Form = 0; Form < 3; Form++)
- if (Opcode == RegOpcodes[Form])
- return true;
- return false;
- }
-
- /// Returns true iff the given \p Opcode is a memory opcode from the
- /// groups of FMA opcodes.
- bool isMemOpcodeFromGroup(unsigned Opcode) const {
- for (unsigned Form = 0; Form < 3; Form++)
- if (Opcode == MemOpcodes[Form])
- return true;
- return false;
- }
};
/// This class provides information about all existing FMA3 opcodes
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 94d381a1901..a5c6b19dd0a 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -6766,15 +6766,9 @@ unsigned X86InstrInfo::getFMA3OpcodeToCommuteOperands(
};
unsigned FMAForms[3];
- if (FMA3Group.isRegOpcodeFromGroup(Opc)) {
- FMAForms[0] = FMA3Group.getReg132Opcode();
- FMAForms[1] = FMA3Group.getReg213Opcode();
- FMAForms[2] = FMA3Group.getReg231Opcode();
- } else {
- FMAForms[0] = FMA3Group.getMem132Opcode();
- FMAForms[1] = FMA3Group.getMem213Opcode();
- FMAForms[2] = FMA3Group.getMem231Opcode();
- }
+ FMAForms[0] = FMA3Group.get132Opcode();
+ FMAForms[1] = FMA3Group.get213Opcode();
+ FMAForms[2] = FMA3Group.get231Opcode();
unsigned FormIndex;
for (FormIndex = 0; FormIndex < 3; FormIndex++)
if (Opc == FMAForms[FormIndex])
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