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-rw-r--r--llvm/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h21
-rw-r--r--llvm/lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h21
2 files changed, 25 insertions, 17 deletions
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h
index 34b732a1ff4..62644ab2f45 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h
@@ -16,7 +16,6 @@
#include "llvm/ADT/APFloat.h"
#include "llvm/ADT/APInt.h"
-#include "llvm/ADT/bit.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include <cassert>
@@ -343,23 +342,27 @@ static inline bool isValidDecodeLogicalImmediate(uint64_t val,
//
static inline float getFPImmFloat(unsigned Imm) {
// We expect an 8-bit binary encoding of a floating-point number here.
+ union {
+ uint32_t I;
+ float F;
+ } FPUnion;
uint8_t Sign = (Imm >> 7) & 0x1;
uint8_t Exp = (Imm >> 4) & 0x7;
uint8_t Mantissa = Imm & 0xf;
- // 8-bit FP IEEE Float Encoding
+ // 8-bit FP iEEEE Float Encoding
// abcd efgh aBbbbbbc defgh000 00000000 00000000
//
// where B = NOT(b);
- uint32_t I = 0;
- I |= Sign << 31;
- I |= ((Exp & 0x4) != 0 ? 0 : 1) << 30;
- I |= ((Exp & 0x4) != 0 ? 0x1f : 0) << 25;
- I |= (Exp & 0x3) << 23;
- I |= Mantissa << 19;
- return bit_cast<float>(I);
+ FPUnion.I = 0;
+ FPUnion.I |= Sign << 31;
+ FPUnion.I |= ((Exp & 0x4) != 0 ? 0 : 1) << 30;
+ FPUnion.I |= ((Exp & 0x4) != 0 ? 0x1f : 0) << 25;
+ FPUnion.I |= (Exp & 0x3) << 23;
+ FPUnion.I |= Mantissa << 19;
+ return FPUnion.F;
}
/// getFP16Imm - Return an 8-bit floating-point version of the 16-bit
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h b/llvm/lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h
index e450d3f5d75..f472b215431 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h
@@ -627,22 +627,27 @@ namespace ARM_AM {
//
inline float getFPImmFloat(unsigned Imm) {
// We expect an 8-bit binary encoding of a floating-point number here.
+ union {
+ uint32_t I;
+ float F;
+ } FPUnion;
uint8_t Sign = (Imm >> 7) & 0x1;
uint8_t Exp = (Imm >> 4) & 0x7;
uint8_t Mantissa = Imm & 0xf;
- // 8-bit FP IEEE Float Encoding
+ // 8-bit FP iEEEE Float Encoding
// abcd efgh aBbbbbbc defgh000 00000000 00000000
//
// where B = NOT(b);
- uint32_t I = 0;
- I |= Sign << 31;
- I |= ((Exp & 0x4) != 0 ? 0 : 1) << 30;
- I |= ((Exp & 0x4) != 0 ? 0x1f : 0) << 25;
- I |= (Exp & 0x3) << 23;
- I |= Mantissa << 19;
- return bit_cast<float>(F);
+
+ FPUnion.I = 0;
+ FPUnion.I |= Sign << 31;
+ FPUnion.I |= ((Exp & 0x4) != 0 ? 0 : 1) << 30;
+ FPUnion.I |= ((Exp & 0x4) != 0 ? 0x1f : 0) << 25;
+ FPUnion.I |= (Exp & 0x3) << 23;
+ FPUnion.I |= Mantissa << 19;
+ return FPUnion.F;
}
/// getFP16Imm - Return an 8-bit floating-point version of the 16-bit
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