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-rw-r--r--llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp14
1 files changed, 14 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index de2c2289251..4b0633142c1 100644
--- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -1450,6 +1450,20 @@ class BitPermutationSelector {
};
for (auto &BG : BitGroups) {
+ // If this bit group has RLAmt of 0 and will not be merged with
+ // another bit group, we don't benefit from Repl32. We don't mark
+ // such group to give more freedom for later instruction selection.
+ if (BG.RLAmt == 0) {
+ auto PotentiallyMerged = [this](BitGroup & BG) {
+ for (auto &BG2 : BitGroups)
+ if (&BG != &BG2 && BG.V == BG2.V &&
+ (BG2.RLAmt == 0 || BG2.RLAmt == 32))
+ return true;
+ return false;
+ };
+ if (!PotentiallyMerged(BG))
+ continue;
+ }
if (BG.StartIdx < 32 && BG.EndIdx < 32) {
if (IsAllLow32(BG)) {
if (BG.RLAmt >= 32) {
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