1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
index f28ed8cf891..9ae4a928fb5 100644
--- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -146,6 +146,13 @@ unsigned X86TTIImpl::getRegisterBitWidth(bool Vector) const {
   return 32;
 }
 
+// Use horizontal 128-bit operations, which use low and high
+// 64-bit parts of vector register. This also allows vectorizer
+// to use partial vector operations.
+unsigned X86TTIImpl::getMinVectorRegisterBitWidth() const {
+  return 64;
+}
+
 unsigned X86TTIImpl::getLoadStoreVecRegBitWidth(unsigned) const {
   return getRegisterBitWidth(true);
 }