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-rw-r--r--llvm/lib/Target/X86/X86SchedSandyBridge.td9
1 files changed, 6 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86SchedSandyBridge.td b/llvm/lib/Target/X86/X86SchedSandyBridge.td
index 3196f2a8f12..67840fa7371 100644
--- a/llvm/lib/Target/X86/X86SchedSandyBridge.td
+++ b/llvm/lib/Target/X86/X86SchedSandyBridge.td
@@ -160,9 +160,12 @@ def : WriteRes<WriteSETCCStore, [SBPort05,SBPort4,SBPort23]> {
let Latency = 2;
let NumMicroOps = 3;
}
-def : WriteRes<WriteLAHFSAHF, [SBPort05]>;
-def : WriteRes<WriteBitTest, [SBPort05]>;
-def : WriteRes<WriteBitTestSet, [SBPort05]>;
+
+defm : X86WriteRes<WriteLAHFSAHF, [SBPort05], 1, [1], 1>;
+defm : X86WriteRes<WriteBitTest, [SBPort05], 1, [1], 1>;
+defm : X86WriteRes<WriteBitTestImmLd, [SBPort05], 1, [1], 1>;
+defm : X86WriteRes<WriteBitTestRegLd, [SBPort05], 1, [1], 1>;
+defm : X86WriteRes<WriteBitTestSet, [SBPort05], 1, [1], 1>;
// This is for simple LEAs with one or two input operands.
// The complex ones can only execute on port 1, and they require two cycles on
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