diff options
Diffstat (limited to 'llvm/lib/Target/X86/X86SchedSandyBridge.td')
| -rw-r--r-- | llvm/lib/Target/X86/X86SchedSandyBridge.td | 10 |
1 files changed, 1 insertions, 9 deletions
diff --git a/llvm/lib/Target/X86/X86SchedSandyBridge.td b/llvm/lib/Target/X86/X86SchedSandyBridge.td index 8b457f91254..860d0db3f6f 100644 --- a/llvm/lib/Target/X86/X86SchedSandyBridge.td +++ b/llvm/lib/Target/X86/X86SchedSandyBridge.td @@ -288,7 +288,7 @@ defm : X86WriteRes<WriteVecStoreNTY, [SBPort23,SBPort4], 1, [1,1], 1>; defm : X86WriteRes<WriteVecMaskedStore, [SBPort4,SBPort01,SBPort23], 5, [1,1,1], 3>; defm : X86WriteRes<WriteVecMaskedStoreY, [SBPort4,SBPort01,SBPort23], 5, [1,1,1], 3>; defm : X86WriteRes<WriteVecMove, [SBPort05], 1, [1], 1>; -defm : X86WriteRes<WriteVecMoveX, [SBPort05], 1, [1], 1>; +defm : X86WriteRes<WriteVecMoveX, [SBPort015], 1, [1], 1>; defm : X86WriteRes<WriteVecMoveY, [SBPort05], 1, [1], 1>; defm : X86WriteRes<WriteVecMoveToGpr, [SBPort0], 2, [1], 1>; defm : X86WriteRes<WriteVecMoveFromGpr, [SBPort5], 1, [1], 1>; @@ -526,14 +526,6 @@ def: InstRW<[SBWriteResGroup5], (instregex "MMX_PABS(B|D|W)rr", "MMX_PALIGNRrri", "MMX_PSIGN(B|D|W)rr")>; -def SBWriteResGroup6 : SchedWriteRes<[SBPort015]> { - let Latency = 1; - let NumMicroOps = 1; - let ResourceCycles = [1]; -} -def: InstRW<[SBWriteResGroup6], (instregex "MMX_MOVQ2DQrr", - "MOVDQ(A|U)rr")>; // NOTE: Different port requirements to VEX equivalents - def SBWriteResGroup9 : SchedWriteRes<[SBPort05]> { let Latency = 2; let NumMicroOps = 2; |
