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-rw-r--r--llvm/lib/Target/X86/X86InstrSystem.td9
1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSystem.td b/llvm/lib/Target/X86/X86InstrSystem.td
index 05a5b36b95e..b5651f314c3 100644
--- a/llvm/lib/Target/X86/X86InstrSystem.td
+++ b/llvm/lib/Target/X86/X86InstrSystem.td
@@ -465,3 +465,12 @@ let Predicates = [In64BitMode] in {
def WRGSBASE64 : RI<0xAE, MRM3r, (outs), (ins GR64:$dst),
"wrgsbase{q}\t$dst", []>, TB, XS;
}
+
+//===----------------------------------------------------------------------===//
+// INVPCID Instruction
+def INVPCID32 : I<0x82, MRMSrcMem, (outs), (ins GR32:$src1, i128mem:$src2),
+ "invpcid {$src2, $src1|$src1, $src2}", []>, OpSize, T8,
+ Requires<[In32BitMode]>;
+def INVPCID64 : I<0x82, MRMSrcMem, (outs), (ins GR64:$src1, i128mem:$src2),
+ "invpcid {$src2, $src1|$src1, $src2}", []>, OpSize, T8,
+ Requires<[In64BitMode]>;
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