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-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp11
1 files changed, 3 insertions, 8 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index c59e9cd7723..a2ae6095f50 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -5253,14 +5253,9 @@ SDValue X86TargetLowering::LowerVSETCC(SDValue Op, SelectionDAG &DAG) {
SDValue Result = DAG.getNode(Opc, VT, Op0, Op1);
// If the logical-not of the result is required, perform that now.
- if (Invert) {
- MVT EltVT = VT.getVectorElementType();
- SDValue NegOne = DAG.getConstant(EltVT.getIntegerVTBitMask(), EltVT);
- std::vector<SDValue> NegOnes(VT.getVectorNumElements(), NegOne);
- SDValue NegOneV = DAG.getNode(ISD::BUILD_VECTOR, VT, &NegOnes[0],
- NegOnes.size());
- Result = DAG.getNode(ISD::XOR, VT, Result, NegOneV);
- }
+ if (Invert)
+ Result = DAG.getNOT(Result, VT);
+
return Result;
}
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