diff options
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 14 |
1 files changed, 4 insertions, 10 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index cb79484d26e..88c7c0725e0 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -19343,16 +19343,6 @@ SDValue X86TargetLowering::LowerSELECT(SDValue Op, SelectionDAG &DAG) const { } } - if (VT == MVT::v4i1 || VT == MVT::v2i1) { - SDValue zeroConst = DAG.getIntPtrConstant(0, DL); - Op1 = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, MVT::v8i1, - DAG.getUNDEF(MVT::v8i1), Op1, zeroConst); - Op2 = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, MVT::v8i1, - DAG.getUNDEF(MVT::v8i1), Op2, zeroConst); - SDValue newSelect = DAG.getSelect(DL, MVT::v8i1, Cond, Op1, Op2); - return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VT, newSelect, zeroConst); - } - if (Cond.getOpcode() == ISD::SETCC) { if (SDValue NewCond = LowerSETCC(Cond, DAG)) { Cond = NewCond; @@ -27468,6 +27458,8 @@ static bool isCMOVPseudo(MachineInstr &MI) { case X86::CMOV_VR256: case X86::CMOV_VR256X: case X86::CMOV_VR512: + case X86::CMOV_VK2: + case X86::CMOV_VK4: case X86::CMOV_VK8: case X86::CMOV_VK16: case X86::CMOV_VK32: @@ -29066,6 +29058,8 @@ X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI, case X86::CMOV_VR256: case X86::CMOV_VR256X: case X86::CMOV_VR512: + case X86::CMOV_VK2: + case X86::CMOV_VK4: case X86::CMOV_VK8: case X86::CMOV_VK16: case X86::CMOV_VK32: |
