diff options
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 8cb528ec9e3..c2887706b6d 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -27882,6 +27882,7 @@ static SDValue combineANDXORWithAllOnesIntoANDNP(SDNode *N, SelectionDAG &DAG) { SDLoc DL(N); if (VT != MVT::v2i64 && VT != MVT::v4i64 && + VT != MVT::v8i64 && VT != MVT::v16i32 && VT != MVT::v4i32 && VT != MVT::v8i32) // Legal with VLX return SDValue(); @@ -27897,7 +27898,7 @@ static SDValue combineANDXORWithAllOnesIntoANDNP(SDNode *N, SelectionDAG &DAG) { N01 = peekThroughBitcasts(N01); - // Either match a direct AllOnes for 128 and 256-bit vectors, or an + // Either match a direct AllOnes for 128, 256, and 512-bit vectors, or an // insert_subvector building a 256-bit AllOnes vector. if (!ISD::isBuildVectorAllOnes(N01.getNode())) { if (!VT.is256BitVector() || N01->getOpcode() != ISD::INSERT_SUBVECTOR) |
