diff options
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 15 |
1 files changed, 2 insertions, 13 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 4edc1d5e807..261645c2233 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -17374,20 +17374,9 @@ static SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, const X86Subtarget *Subtarget SDValue Src2 = Op.getOperand(2); SDValue Src0 = Op.getOperand(3); SDValue Mask = Op.getOperand(4); - // There are 2 kinds of intrinsics in this group: - // (1) With supress-all-exceptions (sae) - 6 operands - // (2) With rounding mode and sae - 7 operands. - if (Op.getNumOperands() == 6) { - SDValue Sae = Op.getOperand(5); - return getScalarMaskingNode(DAG.getNode(IntrData->Opc0, dl, VT, Src1, Src2, - Sae), - Mask, Src0, Subtarget, DAG); - } - assert(Op.getNumOperands() == 7 && "Unexpected intrinsic form"); - SDValue RoundingMode = Op.getOperand(5); - SDValue Sae = Op.getOperand(6); + SDValue RoundingMode = Op.getOperand(5); return getScalarMaskingNode(DAG.getNode(IntrData->Opc0, dl, VT, Src1, Src2, - RoundingMode, Sae), + RoundingMode), Mask, Src0, Subtarget, DAG); } case INTR_TYPE_2OP_MASK: { |
