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-rw-r--r--llvm/lib/Target/SystemZ/SystemZISelLowering.h25
1 files changed, 22 insertions, 3 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.h b/llvm/lib/Target/SystemZ/SystemZISelLowering.h
index 8efe2204581..b8dc4ab65f4 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.h
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.h
@@ -162,6 +162,10 @@ enum NodeType : unsigned {
// Transaction end. Just the chain operand. Returns CC value and chain.
TEND,
+ // Create a vector constant by filling byte N of the result with bit
+ // 15-N of the single operand.
+ BYTE_MASK,
+
// Create a vector constant by replicating an element-sized RISBG-style mask.
// The first operand specifies the starting set bit and the second operand
// specifies the ending set bit. Both operands count from the MSB of the
@@ -513,9 +517,6 @@ public:
return true;
}
- static bool tryBuildVectorByteMask(BuildVectorSDNode *BVN, uint64_t &Mask);
- static bool analyzeFPImm(const APFloat &Imm, unsigned BitWidth,
- unsigned &Start, unsigned &End, const SystemZInstrInfo *TII);
private:
const SystemZSubtarget &Subtarget;
@@ -643,6 +644,24 @@ private:
const TargetRegisterClass *getRepRegClassFor(MVT VT) const override;
};
+
+struct SystemZVectorConstantInfo {
+private:
+ APInt IntBits; // The 128 bits as an integer.
+ APInt SplatBits; // Smallest splat value.
+ APInt SplatUndef; // Bits correspoding to undef operands of the BVN.
+ unsigned SplatBitSize = 0;
+ bool isFP128 = false;
+
+public:
+ unsigned Opcode = 0;
+ SmallVector<unsigned, 2> OpVals;
+ MVT VecVT;
+ SystemZVectorConstantInfo(APFloat FPImm);
+ SystemZVectorConstantInfo(BuildVectorSDNode *BVN);
+ bool isVectorConstantLegal(const SystemZSubtarget &Subtarget);
+};
+
} // end namespace llvm
#endif
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