diff options
Diffstat (limited to 'llvm/lib/Target/RISCV/RISCV.td')
| -rw-r--r-- | llvm/lib/Target/RISCV/RISCV.td | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/llvm/lib/Target/RISCV/RISCV.td b/llvm/lib/Target/RISCV/RISCV.td index da919acad36..d8581f8d03c 100644 --- a/llvm/lib/Target/RISCV/RISCV.td +++ b/llvm/lib/Target/RISCV/RISCV.td @@ -13,11 +13,16 @@ include "llvm/Target/Target.td" // RISC-V subtarget features and instruction predicates. //===----------------------------------------------------------------------===// -def Feature64Bit : SubtargetFeature<"64bit", "HasRV64", "true", - "Implements RV64">; +def FeatureStdExtM : SubtargetFeature<"m", "HasStdExtM", "true", + "'M' (Integer Multiplication and Division)">; +def HasStdExtM : Predicate<"Subtarget->hasStdExtM()">, + AssemblerPredicate<"FeatureStdExtM">; -def RV64 : HwMode<"+64bit">; -def RV32 : HwMode<"-64bit">; +def Feature64Bit : SubtargetFeature<"64bit", "HasRV64", "true", + "Implements RV64">; + +def RV64 : HwMode<"+64bit">; +def RV32 : HwMode<"-64bit">; //===----------------------------------------------------------------------===// // Registers, calling conventions, instruction descriptions. |
