diff options
Diffstat (limited to 'llvm/lib/Target/R600')
| -rw-r--r-- | llvm/lib/Target/R600/AMDGPUFrameLowering.h | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/R600/AMDGPUInstrInfo.h | 7 | ||||
| -rw-r--r-- | llvm/lib/Target/R600/AMDGPUSubtarget.h | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/R600/R600RegisterInfo.h | 2 |
4 files changed, 6 insertions, 7 deletions
diff --git a/llvm/lib/Target/R600/AMDGPUFrameLowering.h b/llvm/lib/Target/R600/AMDGPUFrameLowering.h index ad5de7c309a..d18ede5004e 100644 --- a/llvm/lib/Target/R600/AMDGPUFrameLowering.h +++ b/llvm/lib/Target/R600/AMDGPUFrameLowering.h @@ -33,7 +33,7 @@ public: /// \returns The number of 32-bit sub-registers that are used when storing /// values to the stack. - virtual unsigned getStackWidth(const MachineFunction &MF) const final; + unsigned getStackWidth(const MachineFunction &MF) const; int getFrameIndexOffset(const MachineFunction &MF, int FI) const override; const SpillSlot * getCalleeSavedSpillSlots(unsigned &NumEntries) const override; diff --git a/llvm/lib/Target/R600/AMDGPUInstrInfo.h b/llvm/lib/Target/R600/AMDGPUInstrInfo.h index 3e5640b60b1..74baf6b2a6f 100644 --- a/llvm/lib/Target/R600/AMDGPUInstrInfo.h +++ b/llvm/lib/Target/R600/AMDGPUInstrInfo.h @@ -103,11 +103,11 @@ protected: MachineInstr *LoadMI) const override; /// \returns the smallest register index that will be accessed by an indirect /// read or write or -1 if indirect addressing is not used by this program. - virtual int getIndirectIndexBegin(const MachineFunction &MF) const final; + int getIndirectIndexBegin(const MachineFunction &MF) const; /// \returns the largest register index that will be accessed by an indirect /// read or write or -1 if indirect addressing is not used by this program. - virtual int getIndirectIndexEnd(const MachineFunction &MF) const final; + int getIndirectIndexEnd(const MachineFunction &MF) const; public: bool canFoldMemoryOperand(const MachineInstr *MI, @@ -188,8 +188,7 @@ public: /// \brief Convert the AMDIL MachineInstr to a supported ISA /// MachineInstr - virtual void convertToISA(MachineInstr & MI, MachineFunction &MF, - DebugLoc DL) const final; + void convertToISA(MachineInstr & MI, MachineFunction &MF, DebugLoc DL) const; /// \brief Build a MOV instruction. virtual MachineInstr *buildMovInstr(MachineBasicBlock *MBB, diff --git a/llvm/lib/Target/R600/AMDGPUSubtarget.h b/llvm/lib/Target/R600/AMDGPUSubtarget.h index ca2cbf75b70..98e58efdc85 100644 --- a/llvm/lib/Target/R600/AMDGPUSubtarget.h +++ b/llvm/lib/Target/R600/AMDGPUSubtarget.h @@ -60,7 +60,7 @@ public: AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS); const InstrItineraryData &getInstrItineraryData() const { return InstrItins; } - virtual void ParseSubtargetFeatures(StringRef CPU, StringRef FS) final; + void ParseSubtargetFeatures(StringRef CPU, StringRef FS); bool is64bit() const; bool hasVertexCache() const; diff --git a/llvm/lib/Target/R600/R600RegisterInfo.h b/llvm/lib/Target/R600/R600RegisterInfo.h index 50508de0037..52e1a4bed94 100644 --- a/llvm/lib/Target/R600/R600RegisterInfo.h +++ b/llvm/lib/Target/R600/R600RegisterInfo.h @@ -49,7 +49,7 @@ struct R600RegisterInfo : public AMDGPURegisterInfo { getRegClassWeight(const TargetRegisterClass *RC) const override; // \returns true if \p Reg can be defined in one ALU caluse and used in another. - virtual bool isPhysRegLiveAcrossClauses(unsigned Reg) const final; + bool isPhysRegLiveAcrossClauses(unsigned Reg) const; }; } // End namespace llvm |
