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-rw-r--r--llvm/lib/Target/PowerPC/PPCISelLowering.cpp6
1 files changed, 5 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 49d7c278478..dbb3b144a75 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -3164,8 +3164,12 @@ PPCTargetLowering::LowerCall_SVR4(SDValue Chain, SDValue Callee,
// Set CR bit 6 to true if this is a vararg call with floating args passed in
// registers.
if (isVarArg) {
+ SDVTList VTs = DAG.getVTList(MVT::Other, MVT::Glue);
+ SDValue Ops[] = { Chain, InFlag };
+
Chain = DAG.getNode(seenFloatArg ? PPCISD::CR6SET : PPCISD::CR6UNSET,
- dl, DAG.getVTList(MVT::Other, MVT::Glue), Chain);
+ dl, VTs, Ops, InFlag.getNode() ? 2 : 1);
+
InFlag = Chain.getValue(1);
}
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