diff options
Diffstat (limited to 'llvm/lib/Target/ARM')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.cpp | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.h | 5 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.td | 5 |
5 files changed, 3 insertions, 15 deletions
diff --git a/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp b/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp index db50bde3849..26119059fed 100644 --- a/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp +++ b/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp @@ -336,6 +336,8 @@ unsigned ARMConstantIslands::GetInstSize(MachineInstr *MI) const { // If this machine instr is an inline asm, measure it. if (MI->getOpcode() == ARM::INLINEASM) return TAI->getInlineAsmLength(MI->getOperand(0).getSymbolName()); + if (MI->getOpcode() == ARM::LABEL) + return 0; assert(0 && "Unknown or unset size field for instr!"); break; case ARMII::Size8Bytes: return 8; // Arm instruction x 2. diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index 031cd0a2f55..594a48e788e 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -147,7 +147,7 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM) setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand); // FIXME - use subtarget debug flags if (Subtarget->isTargetDarwin()) - setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand); + setOperationAction(ISD::LABEL, MVT::Other, Expand); setOperationAction(ISD::RET, MVT::Other, Custom); setOperationAction(ISD::GlobalAddress, MVT::i32, Custom); diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.cpp b/llvm/lib/Target/ARM/ARMInstrInfo.cpp index b5425fec8aa..86d6614df3f 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMInstrInfo.cpp @@ -30,10 +30,6 @@ ARMInstrInfo::ARMInstrInfo(const ARMSubtarget &STI) RI(*this, STI) { } -unsigned ARMInstrInfo::getDWARF_LABELOpcode() const { - return ARM::DWARF_LABEL; -} - const TargetRegisterClass *ARMInstrInfo::getPointerRegClass() const { return &ARM::GPRRegClass; } diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.h b/llvm/lib/Target/ARM/ARMInstrInfo.h index 0208121f142..db52a2dbc77 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.h +++ b/llvm/lib/Target/ARM/ARMInstrInfo.h @@ -80,11 +80,6 @@ public: /// This is used for addressing modes. virtual const TargetRegisterClass *getPointerRegClass() const; - /// getDWARF_LABELOpcode - Return the opcode of the target's DWARF_LABEL - /// instruction if it has one. This is used by codegen passes that update - /// DWARF line number info as they modify the code. - virtual unsigned getDWARF_LABELOpcode() const; - /// Return true if the instruction is a register to register move and /// leave the source and dest operands in the passed parameters. /// diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td index 4762a0e8d9c..63aea02d681 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.td +++ b/llvm/lib/Target/ARM/ARMInstrInfo.td @@ -513,11 +513,6 @@ PseudoInst<(ops i32imm:$line, i32imm:$col, i32imm:$file), ".loc $file, $line, $col", [(dwarf_loc (i32 imm:$line), (i32 imm:$col), (i32 imm:$file))]>; -def DWARF_LABEL : -PseudoInst<(ops i32imm:$id), - "\nLdebug_loc${id:no_hash}:", - [(dwarf_label (i32 imm:$id))]>; - def PICADD : AI1<(ops GPR:$dst, GPR:$a, pclabel:$cp), "\n$cp:\n\tadd $dst, pc, $a", [(set GPR:$dst, (ARMpic_add GPR:$a, imm:$cp))]>; |
