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-rw-r--r--llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp3
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 8ae8ce83424..42cd7ba9a6f 100644
--- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -592,6 +592,9 @@ static bool DecodeQPRRegisterClass(llvm::MCInst &Inst, unsigned RegNo,
static bool DecodePredicateOperand(llvm::MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder) {
if (Val == 0xF) return false;
+ // AL predicate is not allowed on Thumb1 branches.
+ if (Inst.getOpcode() == ARM::tBcc && Val == 0xE)
+ return false;
Inst.addOperand(MCOperand::CreateImm(Val));
if (Val == ARMCC::AL) {
Inst.addOperand(MCOperand::CreateReg(0));
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