diff options
Diffstat (limited to 'llvm/lib/Target/ARM')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp index b35a16b8a1e..eecd0a10dc7 100644 --- a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp +++ b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp @@ -1030,10 +1030,10 @@ static void addExclusiveRegPair(MachineInstrBuilder &MIB, MachineOperand &Reg, if (IsThumb) { unsigned RegLo = TRI->getSubReg(Reg.getReg(), ARM::gsub_0); unsigned RegHi = TRI->getSubReg(Reg.getReg(), ARM::gsub_1); - MIB.addReg(RegLo, Flags | getKillRegState(Reg.isDead())); - MIB.addReg(RegHi, Flags | getKillRegState(Reg.isDead())); + MIB.addReg(RegLo, Flags); + MIB.addReg(RegHi, Flags); } else - MIB.addReg(Reg.getReg(), Flags | getKillRegState(Reg.isDead())); + MIB.addReg(Reg.getReg(), Flags); } /// Expand a 64-bit CMP_SWAP to an ldrexd/strexd loop. @@ -1103,7 +1103,8 @@ bool ARMExpandPseudo::ExpandCMP_SWAP_64(MachineBasicBlock &MBB, // bne .Lloadcmp unsigned STREXD = IsThumb ? ARM::t2STREXD : ARM::STREXD; MIB = BuildMI(StoreBB, DL, TII->get(STREXD), TempReg); - addExclusiveRegPair(MIB, New, 0, IsThumb, TRI); + unsigned Flags = getKillRegState(New.isDead()); + addExclusiveRegPair(MIB, New, Flags, IsThumb, TRI); MIB.addReg(AddrReg).add(predOps(ARMCC::AL)); unsigned CMPri = IsThumb ? ARM::t2CMPri : ARM::CMPri; |
