diff options
Diffstat (limited to 'llvm/lib/Target/ARM/ARMInstrThumb2.td')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrThumb2.td | 299 |
1 files changed, 1 insertions, 298 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrThumb2.td b/llvm/lib/Target/ARM/ARMInstrThumb2.td index e324dbe5466..e82cbeef43f 100644 --- a/llvm/lib/Target/ARM/ARMInstrThumb2.td +++ b/llvm/lib/Target/ARM/ARMInstrThumb2.td @@ -150,26 +150,6 @@ def lo5AllOne : PatLeaf<(i32 imm), [{ // Define Thumb2 specific addressing modes. -// t2_addr_offset_none := reg -def MemNoOffsetT2AsmOperand - : AsmOperandClass { let Name = "MemNoOffsetT2"; } -def t2_addr_offset_none : MemOperand { - let PrintMethod = "printAddrMode7Operand"; - let DecoderMethod = "DecodeGPRnopcRegisterClass"; - let ParserMatchClass = MemNoOffsetT2AsmOperand; - let MIOperandInfo = (ops GPRnopc:$base); -} - -// t2_nosp_addr_offset_none := reg -def MemNoOffsetT2NoSpAsmOperand - : AsmOperandClass { let Name = "MemNoOffsetT2NoSp"; } -def t2_nosp_addr_offset_none : MemOperand { - let PrintMethod = "printAddrMode7Operand"; - let DecoderMethod = "Decodet2rGPRRegisterClass"; - let ParserMatchClass = MemNoOffsetT2NoSpAsmOperand; - let MIOperandInfo = (ops t2rGPR:$base); -} - // t2addrmode_imm12 := reg + imm12 def t2addrmode_imm12_asmoperand : AsmOperandClass {let Name="MemUImm12Offset";} def t2addrmode_imm12 : MemOperand, @@ -267,38 +247,10 @@ def t2addrmode_imm8s4_pre : T2AddrMode_Imm8s4 { def t2am_imm8s4_offset_asmoperand : AsmOperandClass { let Name = "Imm8s4"; } def t2am_imm8s4_offset : MemOperand { let PrintMethod = "printT2AddrModeImm8s4OffsetOperand"; - let EncoderMethod = "getT2ScaledImmOpValue<8,2>"; + let EncoderMethod = "getT2Imm8s4OpValue"; let DecoderMethod = "DecodeT2Imm8S4"; } -// t2addrmode_imm7s4 := reg +/- (imm7 << 2) -def MemImm7s4OffsetAsmOperand : AsmOperandClass {let Name = "MemImm7s4Offset";} -class T2AddrMode_Imm7s4 : MemOperand { - let EncoderMethod = "getT2AddrModeImm7s4OpValue"; - let DecoderMethod = "DecodeT2AddrModeImm7<2,0>"; - let ParserMatchClass = MemImm7s4OffsetAsmOperand; - let MIOperandInfo = (ops GPRnopc:$base, i32imm:$offsimm); -} - -def t2addrmode_imm7s4 : T2AddrMode_Imm7s4 { - // They are printed the same way as the imm8 version - let PrintMethod = "printT2AddrModeImm8s4Operand<false>"; -} - -def t2addrmode_imm7s4_pre : T2AddrMode_Imm7s4 { - // They are printed the same way as the imm8 version - let PrintMethod = "printT2AddrModeImm8s4Operand<true>"; -} - -def t2am_imm7s4_offset_asmoperand : AsmOperandClass { let Name = "Imm7s4"; } -def t2am_imm7s4_offset : MemOperand { - // They are printed the same way as the imm8 version - let PrintMethod = "printT2AddrModeImm8s4OffsetOperand"; - let ParserMatchClass = t2am_imm7s4_offset_asmoperand; - let EncoderMethod = "getT2ScaledImmOpValue<7,2>"; - let DecoderMethod = "DecodeT2Imm7S4"; -} - // t2addrmode_imm0_1020s4 := reg + (imm8 << 2) def MemImm0_1020s4OffsetAsmOperand : AsmOperandClass { let Name = "MemImm0_1020s4Offset"; @@ -337,55 +289,6 @@ def addrmode_tbh : MemOperand { let MIOperandInfo = (ops GPR:$Rn, rGPR:$Rm); } -// Define ARMv8.1-M specific addressing modes. - -// Label operands for BF/BFL/WLS/DLS/LE -class BFLabelOp<string signed, string isNeg, string size, string fixup> - : Operand<OtherVT> { - let EncoderMethod = !strconcat("getBFTargetOpValue<", isNeg, ", ", - fixup, ">"); - let OperandType = "OPERAND_PCREL"; - let DecoderMethod = !strconcat("DecodeBFLabelOperand<", signed, ", ", - isNeg, ", ", size, ">"); -} -def bflabel_u4 : BFLabelOp<"false", "false", "4", "ARM::fixup_bf_branch">; -def bflabel_s12 : BFLabelOp<"true", "false", "12", "ARM::fixup_bfc_target">; -def bflabel_s16 : BFLabelOp<"true", "false", "16", "ARM::fixup_bf_target">; -def bflabel_s18 : BFLabelOp<"true", "false", "18", "ARM::fixup_bfl_target">; -def wlslabel_u11 : BFLabelOp<"false", "false", "11", "ARM::fixup_wls">; -def lelabel_u11 : BFLabelOp<"false", "true", "11", "ARM::fixup_le">; - -def bfafter_target : Operand<OtherVT> { - let EncoderMethod = "getBFAfterTargetOpValue"; - let OperandType = "OPERAND_PCREL"; - let DecoderMethod = "DecodeBFAfterTargetOperand"; -} - -// pred operand excluding AL -def pred_noal_asmoperand : AsmOperandClass { - let Name = "CondCodeNoAL"; - let RenderMethod = "addITCondCodeOperands"; - let PredicateMethod = "isITCondCodeNoAL"; - let ParserMethod = "parseITCondCode"; -} -def pred_noal : Operand<i32> { - let PrintMethod = "printMandatoryPredicateOperand"; - let ParserMatchClass = pred_noal_asmoperand; - let DecoderMethod = "DecodePredNoALOperand"; -} - - -// CSEL aliases inverted predicate -def pred_noal_inv_asmoperand : AsmOperandClass { - let Name = "CondCodeNoALInv"; - let RenderMethod = "addITCondCodeInvOperands"; - let PredicateMethod = "isITCondCodeNoAL"; - let ParserMethod = "parseITCondCode"; -} -def pred_noal_inv : Operand<i32> { - let PrintMethod = "printMandatoryInvertedPredicateOperand"; - let ParserMatchClass = pred_noal_inv_asmoperand; -} //===----------------------------------------------------------------------===// // Multiclass helpers... // @@ -5008,203 +4911,3 @@ def : t2InstAlias<"pld${p} $addr", def : InstAlias<"pli${p} $addr", (t2PLIpci t2ldr_pcrel_imm12:$addr, pred:$p), 0>, Requires<[IsThumb2,HasV7]>; - - -//===----------------------------------------------------------------------===// -// ARMv8.1m instructions -// - -class V8_1MI<dag oops, dag iops, AddrMode am, InstrItinClass itin, string asm, - string ops, string cstr, list<dag> pattern> - : Thumb2XI<oops, iops, am, 4, itin, !strconcat(asm, "\t", ops), cstr, - pattern>, - Requires<[HasV8_1MMainline]>; - -def t2CLRM : V8_1MI<(outs), - (ins pred:$p, reglist_with_apsr:$regs, variable_ops), - AddrModeNone, NoItinerary, "clrm", "${p}\t$regs", "", []> { - bits<16> regs; - - let Inst{31-16} = 0b1110100010011111; - let Inst{15-14} = regs{15-14}; - let Inst{13} = 0b0; - let Inst{12-0} = regs{12-0}; -} - -class t2BF<dag iops, string asm, string ops> - : V8_1MI<(outs ), iops, AddrModeNone, NoItinerary, asm, ops, "", []> { - - let Inst{31-27} = 0b11110; - let Inst{15-14} = 0b11; - let Inst{12} = 0b0; - let Inst{0} = 0b1; - - let Predicates = [IsThumb2, HasV8_1MMainline, HasLOB]; -} - -def t2BF_LabelPseudo - : t2PseudoInst<(outs ), (ins pclabel:$cp), 0, NoItinerary, []> { - let isTerminator = 1; - let Predicates = [IsThumb2, HasV8_1MMainline, HasLOB]; -} - -def t2BFi : t2BF<(ins bflabel_u4:$b_label, bflabel_s16:$label, pred:$p), - !strconcat("bf", "${p}"), "$b_label, $label"> { - bits<4> b_label; - bits<16> label; - - let Inst{26-23} = b_label{3-0}; - let Inst{22-21} = 0b10; - let Inst{20-16} = label{15-11}; - let Inst{13} = 0b1; - let Inst{11} = label{0}; - let Inst{10-1} = label{10-1}; -} - -def t2BFic : t2BF<(ins bflabel_u4:$b_label, bflabel_s12:$label, - bfafter_target:$ba_label, pred_noal:$bcond), "bfcsel", - "$b_label, $label, $ba_label, $bcond"> { - bits<4> bcond; - bits<12> label; - bits<1> ba_label; - bits<4> b_label; - - let Inst{26-23} = b_label{3-0}; - let Inst{22} = 0b0; - let Inst{21-18} = bcond{3-0}; - let Inst{17} = ba_label{0}; - let Inst{16} = label{11}; - let Inst{13} = 0b1; - let Inst{11} = label{0}; - let Inst{10-1} = label{10-1}; -} - -def t2BFr : t2BF<(ins bflabel_u4:$b_label, rGPR:$Rn, pred:$p), - !strconcat("bfx", "${p}"), "$b_label, $Rn"> { - bits<4> b_label; - bits<4> Rn; - - let Inst{26-23} = b_label{3-0}; - let Inst{22-20} = 0b110; - let Inst{19-16} = Rn{3-0}; - let Inst{13-1} = 0b1000000000000; -} - -def t2BFLi : t2BF<(ins bflabel_u4:$b_label, bflabel_s18:$label, pred:$p), - !strconcat("bfl", "${p}"), "$b_label, $label"> { - bits<4> b_label; - bits<18> label; - - let Inst{26-23} = b_label{3-0}; - let Inst{22-16} = label{17-11}; - let Inst{13} = 0b0; - let Inst{11} = label{0}; - let Inst{10-1} = label{10-1}; -} - -def t2BFLr : t2BF<(ins bflabel_u4:$b_label, rGPR:$Rn, pred:$p), - !strconcat("bflx", "${p}"), "$b_label, $Rn"> { - bits<4> b_label; - bits<4> Rn; - - let Inst{26-23} = b_label{3-0}; - let Inst{22-20} = 0b111; - let Inst{19-16} = Rn{3-0}; - let Inst{13-1} = 0b1000000000000; -} - -class t2LOL<dag oops, dag iops, string asm, string ops> - : V8_1MI<oops, iops, AddrModeNone, NoItinerary, asm, ops, "", [] > { - let Inst{31-23} = 0b111100000; - let Inst{15-14} = 0b11; - let Inst{0} = 0b1; - let isBranch = 1; - let isTerminator = 1; - let DecoderMethod = "DecodeLOLoop"; - let Predicates = [IsThumb2, HasV8_1MMainline, HasLOB]; -} - -def t2WLS : t2LOL<(outs GPRlr:$LR), - (ins rGPR:$Rn, wlslabel_u11:$label), - "wls", "$LR, $Rn, $label"> { - bits<4> Rn; - bits<11> label; - let Inst{22-20} = 0b100; - let Inst{19-16} = Rn{3-0}; - let Inst{13-12} = 0b00; - let Inst{11} = label{0}; - let Inst{10-1} = label{10-1}; - let usesCustomInserter = 1; -} - -def t2DLS : t2LOL<(outs GPRlr:$LR), (ins rGPR:$Rn), - "dls", "$LR, $Rn"> { - bits<4> Rn; - let isBranch = 0; - let isTerminator = 0; - let Inst{22-20} = 0b100; - let Inst{19-16} = Rn{3-0}; - let Inst{13-1} = 0b1000000000000; - let usesCustomInserter = 1; -} - -def t2LEUpdate : t2LOL<(outs GPRlr:$LRout), - (ins GPRlr:$LRin, lelabel_u11:$label), - "le", "$LRin, $label"> { - bits<11> label; - let Inst{22-16} = 0b0001111; - let Inst{13-12} = 0b00; - let Inst{11} = label{0}; - let Inst{10-1} = label{10-1}; - let usesCustomInserter = 1; -} - -def t2LE : t2LOL<(outs ), (ins lelabel_u11:$label), "le", "$label"> { - bits<11> label; - let Inst{22-16} = 0b0101111; - let Inst{13-12} = 0b00; - let Inst{11} = label{0}; - let Inst{10-1} = label{10-1}; -} - -class CS<string iname, bits<4> opcode, list<dag> pattern=[]> - : V8_1MI<(outs rGPR:$Rd), (ins GPRwithZR:$Rn, GPRwithZR:$Rm, pred_noal:$fcond), - AddrModeNone, NoItinerary, iname, "$Rd, $Rn, $Rm, $fcond", "", pattern> { - bits<4> Rd; - bits<4> Rm; - bits<4> Rn; - bits<4> fcond; - - let Inst{31-20} = 0b111010100101; - let Inst{19-16} = Rn{3-0}; - let Inst{15-12} = opcode; - let Inst{11-8} = Rd{3-0}; - let Inst{7-4} = fcond{3-0}; - let Inst{3-0} = Rm{3-0}; - - let Uses = [CPSR]; -} - -def t2CSEL : CS<"csel", 0b1000>; -def t2CSINC : CS<"csinc", 0b1001>; -def t2CSINV : CS<"csinv", 0b1010>; -def t2CSNEG : CS<"csneg", 0b1011>; - - -// CS aliases. -let Predicates = [HasV8_1MMainline] in { - def : InstAlias<"csetm\t$Rd, $fcond", - (t2CSINV rGPR:$Rd, ZR, ZR, pred_noal_inv:$fcond)>; - - def : InstAlias<"cset\t$Rd, $fcond", - (t2CSINC rGPR:$Rd, ZR, ZR, pred_noal_inv:$fcond)>; - - def : InstAlias<"cinc\t$Rd, $Rn, $fcond", - (t2CSINC rGPR:$Rd, GPRwithZR:$Rn, GPRwithZR:$Rn, pred_noal_inv:$fcond)>; - - def : InstAlias<"cinv\t$Rd, $Rn, $fcond", - (t2CSINV rGPR:$Rd, GPRwithZR:$Rn, GPRwithZR:$Rn, pred_noal_inv:$fcond)>; - - def : InstAlias<"cneg\t$Rd, $Rn, $fcond", - (t2CSNEG rGPR:$Rd, GPRwithZR:$Rn, GPRwithZR:$Rn, pred_noal_inv:$fcond)>; -} |
