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-rw-r--r--llvm/lib/Target/ARM/ARM.td6
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td
index bf12c323fa6..3bf81828bf7 100644
--- a/llvm/lib/Target/ARM/ARM.td
+++ b/llvm/lib/Target/ARM/ARM.td
@@ -70,6 +70,8 @@ def FeatureTrustZone : SubtargetFeature<"trustzone", "HasTrustZone", "true",
def FeatureCrypto : SubtargetFeature<"crypto", "HasCrypto", "true",
"Enable support for Cryptography extensions",
[FeatureNEON]>;
+def FeatureCRC : SubtargetFeature<"crc", "HasCRC", "true",
+ "Enable support for CRC instructions">;
// Some processors have FP multiply-accumulate instructions that don't
// play nicely with other VFP / NEON instructions, and it's generally better
@@ -202,13 +204,13 @@ def ProcA53 : SubtargetFeature<"a53", "ARMProcFamily", "CortexA53",
"Cortex-A53 ARM processors",
[FeatureMP, FeatureHWDiv, FeatureHWDivARM,
FeatureTrustZone, FeatureT2XtPk,
- FeatureCrypto]>;
+ FeatureCrypto, FeatureCRC]>;
def ProcA57 : SubtargetFeature<"a57", "ARMProcFamily", "CortexA57",
"Cortex-A57 ARM processors",
[FeatureMP, FeatureHWDiv, FeatureHWDivARM,
FeatureTrustZone, FeatureT2XtPk,
- FeatureCrypto]>;
+ FeatureCrypto, FeatureCRC]>;
def ProcR5 : SubtargetFeature<"r5", "ARMProcFamily", "CortexR5",
"Cortex-R5 ARM processors",
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