diff options
Diffstat (limited to 'llvm/lib/Target/ARM/ARM.td')
| -rw-r--r-- | llvm/lib/Target/ARM/ARM.td | 22 |
1 files changed, 6 insertions, 16 deletions
diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td index fb227a85d67..ab1799a8205 100644 --- a/llvm/lib/Target/ARM/ARM.td +++ b/llvm/lib/Target/ARM/ARM.td @@ -72,8 +72,6 @@ def FeatureHWDiv : SubtargetFeature<"hwdiv", "HasHardwareDivide", "true", def FeatureHWDivARM : SubtargetFeature<"hwdiv-arm", "HasHardwareDivideInARM", "true", "Enable divide instructions in ARM mode">; -def FeatureT2XtPk : SubtargetFeature<"t2xtpk", "HasT2ExtractPack", "true", - "Enable Thumb2 extract and pack instructions">; def FeatureDB : SubtargetFeature<"db", "HasDataBarrier", "true", "Has data barrier (dmb / dsb) instructions">; def FeatureV7Clrex : SubtargetFeature<"v7clrex", "HasV7Clrex", "true", @@ -297,8 +295,7 @@ def HasV7Ops : SubtargetFeature<"v7", "HasV7Ops", "true", FeatureV7Clrex]>; def HasV8Ops : SubtargetFeature<"v8", "HasV8Ops", "true", "Support ARM v8 instructions", - [HasV7Ops, FeatureAcquireRelease, - FeatureT2XtPk]>; + [HasV7Ops, FeatureAcquireRelease]>; def HasV8_1aOps : SubtargetFeature<"v8.1a", "HasV8_1aOps", "true", "Support ARM v8.1a instructions", [HasV8Ops]>; @@ -393,8 +390,7 @@ def ARMv5tej : Architecture<"armv5tej", "ARMv5tej", [HasV5TEOps]>; def ARMv6 : Architecture<"armv6", "ARMv6", [HasV6Ops]>; def ARMv6t2 : Architecture<"armv6t2", "ARMv6t2", [HasV6T2Ops, - FeatureDSP, - FeatureT2XtPk]>; + FeatureDSP]>; def ARMv6k : Architecture<"armv6k", "ARMv6k", [HasV6KOps]>; @@ -415,8 +411,7 @@ def ARMv7a : Architecture<"armv7-a", "ARMv7a", [HasV7Ops, FeatureNEON, FeatureDB, FeatureDSP, - FeatureAClass, - FeatureT2XtPk]>; + FeatureAClass]>; def ARMv7ve : Architecture<"armv7ve", "ARMv7ve", [HasV7Ops, FeatureNEON, @@ -425,15 +420,13 @@ def ARMv7ve : Architecture<"armv7ve", "ARMv7ve", [HasV7Ops, FeatureTrustZone, FeatureMP, FeatureVirtualization, - FeatureAClass, - FeatureT2XtPk]>; + FeatureAClass]>; def ARMv7r : Architecture<"armv7-r", "ARMv7r", [HasV7Ops, FeatureDB, FeatureDSP, FeatureHWDiv, - FeatureRClass, - FeatureT2XtPk]>; + FeatureRClass]>; def ARMv7m : Architecture<"armv7-m", "ARMv7m", [HasV7Ops, FeatureThumb2, @@ -448,8 +441,7 @@ def ARMv7em : Architecture<"armv7e-m", "ARMv7em", [HasV7Ops, FeatureDB, FeatureHWDiv, FeatureMClass, - FeatureDSP, - FeatureT2XtPk]>; + FeatureDSP]>; def ARMv8a : Architecture<"armv8-a", "ARMv8a", [HasV8Ops, FeatureAClass, @@ -491,7 +483,6 @@ def ARMv82a : Architecture<"armv8.2-a", "ARMv82a", [HasV8_2aOps, def ARMv8r : Architecture<"armv8-r", "ARMv8r", [HasV8Ops, FeatureRClass, FeatureDB, - FeatureT2XtPk, FeatureDSP, FeatureCRC, FeatureMP, @@ -764,7 +755,6 @@ def : ProcNoItin<"cortex-m23", [ARMv8mBaseline, def : ProcNoItin<"cortex-m33", [ARMv8mMainline, FeatureDSP, - FeatureT2XtPk, FeatureFPARMv8, FeatureD16, FeatureVFPOnlySP]>; |
