summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM/ARM.td
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/lib/Target/ARM/ARM.td')
-rw-r--r--llvm/lib/Target/ARM/ARM.td2
1 files changed, 0 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td
index fed4cb2b931..713b917e636 100644
--- a/llvm/lib/Target/ARM/ARM.td
+++ b/llvm/lib/Target/ARM/ARM.td
@@ -1197,8 +1197,6 @@ def : ProcessorModel<"cyclone", SwiftModel, [ARMv8a, ProcSwift,
FeatureZCZeroing,
FeatureNoPostRASched]>;
-def : ProcNoItin<"exynos-m1", [ARMv8a, ProcExynos]>;
-def : ProcNoItin<"exynos-m2", [ARMv8a, ProcExynos]>;
def : ProcNoItin<"exynos-m3", [ARMv8a, ProcExynos]>;
def : ProcNoItin<"exynos-m4", [ARMv82a, ProcExynos,
FeatureFullFP16,
OpenPOWER on IntegriCloud