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-rw-r--r--llvm/lib/Target/AMDGPU/VIInstrFormats.td26
1 files changed, 19 insertions, 7 deletions
diff --git a/llvm/lib/Target/AMDGPU/VIInstrFormats.td b/llvm/lib/Target/AMDGPU/VIInstrFormats.td
index 7a476bc87ff..c21137233e2 100644
--- a/llvm/lib/Target/AMDGPU/VIInstrFormats.td
+++ b/llvm/lib/Target/AMDGPU/VIInstrFormats.td
@@ -104,8 +104,7 @@ class SMEMe_vi <bits<8> op, bit imm> : Enc64 {
let Inst{51-32} = offset;
}
-class VOP3e_vi <bits<10> op> : Enc64 {
- bits<8> vdst;
+class VOP3a_vi <bits<10> op> : Enc64 {
bits<2> src0_modifiers;
bits<9> src0;
bits<2> src1_modifiers;
@@ -115,7 +114,6 @@ class VOP3e_vi <bits<10> op> : Enc64 {
bits<1> clamp;
bits<2> omod;
- let Inst{7-0} = vdst;
let Inst{8} = src0_modifiers{1};
let Inst{9} = src1_modifiers{1};
let Inst{10} = src2_modifiers{1};
@@ -131,6 +129,20 @@ class VOP3e_vi <bits<10> op> : Enc64 {
let Inst{63} = src2_modifiers{0};
}
+class VOP3e_vi <bits<10> op> : VOP3a_vi <op> {
+ bits<8> vdst;
+
+ let Inst{7-0} = vdst;
+}
+
+// Encoding used for VOPC instructions encoded as VOP3
+// Differs from VOP3e by destination name (sdst) as VOPC doesn't have vector dst
+class VOP3ce_vi <bits<10> op> : VOP3a_vi <op> {
+ bits<8> sdst;
+
+ let Inst{7-0} = sdst;
+}
+
class VOP3be_vi <bits<10> op> : Enc64 {
bits<8> vdst;
bits<2> src0_modifiers;
@@ -183,21 +195,21 @@ class VOP_DPPe : Enc64 {
}
class VOP1_DPPe <bits<8> op> : VOP_DPPe {
- bits<8> dst;
+ bits<8> vdst;
let Inst{8-0} = 0xfa; // dpp
let Inst{16-9} = op;
- let Inst{24-17} = dst;
+ let Inst{24-17} = vdst;
let Inst{31-25} = 0x3f; //encoding
}
class VOP2_DPPe <bits<6> op> : Enc32 {
- bits<8> dst;
+ bits<8> vdst;
bits<8> src1;
let Inst{8-0} = 0xfa; //dpp
let Inst{16-9} = src1;
- let Inst{24-17} = dst;
+ let Inst{24-17} = vdst;
let Inst{30-25} = op;
let Inst{31} = 0x0; //encoding
}
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