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-rw-r--r--llvm/lib/Target/AMDGPU/SIInstrFormats.td9
1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrFormats.td b/llvm/lib/Target/AMDGPU/SIInstrFormats.td
index faf14fff5b2..250fb9eda2a 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrFormats.td
+++ b/llvm/lib/Target/AMDGPU/SIInstrFormats.td
@@ -11,9 +11,18 @@
//
//===----------------------------------------------------------------------===//
+def isGCN : Predicate<"Subtarget->getGeneration() "
+ ">= SISubtarget::SOUTHERN_ISLANDS">,
+ AssemblerPredicate<"FeatureGCN">;
+def isSI : Predicate<"Subtarget->getGeneration() "
+ "== SISubtarget::SOUTHERN_ISLANDS">,
+ AssemblerPredicate<"FeatureSouthernIslands">;
+
+
class InstSI <dag outs, dag ins, string asm = "",
list<dag> pattern = []> :
AMDGPUInst<outs, ins, asm, pattern>, PredicateControl {
+ let SubtargetPredicate = isGCN;
// Low bits - basic encoding information.
field bit SALU = 0;
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