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-rw-r--r--llvm/lib/Target/AMDGPU/R600ISelLowering.cpp8
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
index 4ed5c881491..124a9c6e0f5 100644
--- a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
@@ -286,6 +286,14 @@ MachineBasicBlock * R600TargetLowering::EmitInstrWithCustomInserter(
.addImm(isEOP(I)); // Set End of program bit
break;
}
+ case AMDGPU::RAT_STORE_TYPED_eg: {
+ BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(MI->getOpcode()))
+ .addOperand(MI->getOperand(0))
+ .addOperand(MI->getOperand(1))
+ .addOperand(MI->getOperand(2))
+ .addImm(isEOP(I)); // Set End of program bit
+ break;
+ }
case AMDGPU::TXD: {
unsigned T0 = MRI.createVirtualRegister(&AMDGPU::R600_Reg128RegClass);
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