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-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp10
1 files changed, 0 insertions, 10 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
index 6f75c9cd924..d3f5c5d41e1 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
@@ -445,16 +445,6 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(const TargetMachine &TM,
PredictableSelectIsExpensive = false;
- // We want to find all load dependencies for long chains of stores to enable
- // merging into very wide vectors. The problem is with vectors with > 4
- // elements. MergeConsecutiveStores will attempt to merge these because x8/x16
- // vectors are a legal type, even though we have to split the loads
- // usually. When we can more precisely specify load legality per address
- // space, we should be able to make FindBetterChain/MergeConsecutiveStores
- // smarter so that they can figure out what to do in 2 iterations without all
- // N > 4 stores on the same chain.
- GatherAllAliasesMaxDepth = 16;
-
// FIXME: Need to really handle these.
MaxStoresPerMemcpy = 4096;
MaxStoresPerMemmove = 4096;
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