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-rw-r--r--llvm/lib/CodeGen/ScheduleDAGInstrs.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/ScheduleDAGInstrs.h b/llvm/lib/CodeGen/ScheduleDAGInstrs.h
index f3932892563..55da5c08181 100644
--- a/llvm/lib/CodeGen/ScheduleDAGInstrs.h
+++ b/llvm/lib/CodeGen/ScheduleDAGInstrs.h
@@ -107,6 +107,9 @@ namespace llvm {
/// isPostRA flag indicates vregs cannot be present.
bool IsPostRA;
+ /// UnitLatencies flag forces single-cycle data dependencies.
+ bool UnitLatencies;
+
/// Defs, Uses - Remember where defs and uses of each register are as we
/// iterate upward through the instructions. This is allocated here instead
/// of inside BuildSchedGraph to avoid the need for it to be initialized and
@@ -205,6 +208,10 @@ namespace llvm {
virtual void dumpNode(const SUnit *SU) const;
virtual std::string getGraphNodeLabel(const SUnit *SU) const;
+
+ protected:
+ void addPhysRegDeps(SUnit *SU, unsigned OperIdx);
+ void addVirtRegDeps(SUnit *SU, unsigned OperIdx);
};
}
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