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Diffstat (limited to 'llvm/lib/CodeGen/MachineRegisterInfo.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineRegisterInfo.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/MachineRegisterInfo.cpp b/llvm/lib/CodeGen/MachineRegisterInfo.cpp
index dfa0a4af334..a075543aecf 100644
--- a/llvm/lib/CodeGen/MachineRegisterInfo.cpp
+++ b/llvm/lib/CodeGen/MachineRegisterInfo.cpp
@@ -183,7 +183,7 @@ void MachineRegisterInfo::verifyUseList(unsigned Reg) const {
MachineOperand *MO = &M;
MachineInstr *MI = MO->getParent();
if (!MI) {
- errs() << PrintReg(Reg, getTargetRegisterInfo())
+ errs() << printReg(Reg, getTargetRegisterInfo())
<< " use list MachineOperand " << MO
<< " has no parent instruction.\n";
Valid = false;
@@ -192,19 +192,19 @@ void MachineRegisterInfo::verifyUseList(unsigned Reg) const {
MachineOperand *MO0 = &MI->getOperand(0);
unsigned NumOps = MI->getNumOperands();
if (!(MO >= MO0 && MO < MO0+NumOps)) {
- errs() << PrintReg(Reg, getTargetRegisterInfo())
+ errs() << printReg(Reg, getTargetRegisterInfo())
<< " use list MachineOperand " << MO
<< " doesn't belong to parent MI: " << *MI;
Valid = false;
}
if (!MO->isReg()) {
- errs() << PrintReg(Reg, getTargetRegisterInfo())
+ errs() << printReg(Reg, getTargetRegisterInfo())
<< " MachineOperand " << MO << ": " << *MO
<< " is not a register\n";
Valid = false;
}
if (MO->getReg() != Reg) {
- errs() << PrintReg(Reg, getTargetRegisterInfo())
+ errs() << printReg(Reg, getTargetRegisterInfo())
<< " use-list MachineOperand " << MO << ": "
<< *MO << " is the wrong register\n";
Valid = false;
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